Switching Waveforms (continued)
Read Cycle No. 2 [11,12]
tRC
CE
tACE
OE
DATA OUT
VCC
SUPPLY
CURRENT
tDOE
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
50%
DATA VALID
[8,13,14]
Write Cycle No. 1 (WE Controlled)
ADDRESS
CE
tSA
WE
tWC
tAW
tPWE
CY62256
tHZOE
tHZCE
HIGH
IMPEDANCE
tPD
50%
ICC
ISB
C62256–9
tHA
OE
DATA I/O
NOTE 15
tHZOE
tSD
DATAIN VALID
[8,13,14]
Write Cycle No. 2 (CE Controlled)
tWC
ADDRESS
CE
tSCE
tSA
tAW
WE
DATA I/O
tSD
DATAIN VALID
Notes:
12. Address valid prior to or coincident with CE transition LOW.
13. Data I/O is high impedance if OE = VIH.
14. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
tHD
tHA
tHD
C62256–10
C62256–11
5