7C408A-15 Просмотр технического описания (PDF) - Cypress Semiconductor
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7C408A-15 Datasheet PDF : 16 Pages
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CY7C408A
CY7C409A
Switching Characteristics Over the Operating Range[3, 6]
Parameter
Description
Test
Conditions
7C408A-15
7C409A-15
Min. Max.
7C408A-25
7C409A-25
Min. Max.
7C408A-35
7C409A-35
Min. Max.
Unit
fO
Operating Frequency
Note 7
15
25
35 MHz
tPHSI
SI HIGH Time
Note 7
23
11
9
ns
tPLSI
SI LOW Time
Note 7
25
24
17
ns
tSSI
Data Set-Up to SI
Note 8
0
0
0
ns
tHSI
Data Hold from SI
Note 8
30
20
12
ns
tDLIR
Delay, SI HIGH to IR LOW
35
21
15
ns
tDHIR
Delay, SI LOW to IR HIGH
40
23
16
ns
tPHSO
SO HIGH Time
Note 7
23
11
9
ns
tPLSO
SO LOW Time
Note 7
25
24
17
ns
tDLOR
Delay, SO HIGH to OR LOW
35
21
15
ns
tDHOR
Delay, SO LOW to OR HIGH
40
23
16
ns
tSOR
Data Set-Up to OR HIGH
0
0
0
ns
tHSO
Data Hold from SO LOW
0
0
0
ns
tBT
Fall-through, Bubble-back Time
10
65
10
60
10
50
ns
tSIR
Data Set-Up to IR
Note 9
5
5
5
ns
tHIR
Data Hold from IR
Note 9
30
20
20
ns
tPIR
Input Ready Pulse HIGH
Note 10
6
6
6
ns
tPOR
Output Ready Pulse HIGH
Note 11
6
6
6
ns
tDLZOE
OE LOW to LOW Z (7C408A)
Note 12
35
30
25
ns
tDHZOE
OE HIGH to HIGH Z (7C408A)
Note 7
35
30
25
ns
tDHHF
SI LOW to HF HIGH
65
55
45
ns
tDLHF
SO LOW to HF LOW
65
55
45
ns
tDLAFE
SO or SI LOW to AFE LOW
65
55
45
ns
tDHAFE
SO or SI LOW to AFE HIGH
65
55
45
ns
tPMR
MR Pulse Width
55
45
35
ns
tDSI
MR HIGH to SI HIGH
25
10
10
ns
tDOR
MR LOW to OR LOW
55
45
35
ns
tDIR
MR LOW to IR HIGH
55
45
35
ns
tLZMR
MR LOW to Output LOW
Note 13
55
45
35
ns
tAFE
MR LOW to AFE HIGH
55
45
35
ns
tHF
MR LOW to HF LOW
55
45
35
ns
tOD
SO LOW to Next Data Out Valid
28
20
16
ns
Notes:
6. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V and output loading of the specified IOL/IOH and 30-pF load
capacitance, as in parts (a) and (b) of AC Test Loads and Waveforms.
7. 1/fO > (tPHSI + tPLSI), 1/fO > (tPHSO + tPLSO).
8. tSSI and tHSI apply when memory is not full.
9. tSIR and tHIR apply when memory is full, SI is high and minimum bubble-through (tBT) conditions exist.
10. At any given operating condition tPIR > (tPHSO required).
11. At any given operating condition tPOR > (tPHSI required).
12. tDHZOE and tDLZOE are specified with CL = 5 pF as in part (b) of AC Test Loads and Waveforms. tDHZOE transition is measured ±500 mV from steady-state
voltage. tDLZOE transition is measured ±100 mV from steady-state voltage. These parameters are guaranteed and not 100% tested.
13. All data outputs will be at LOW level after reset goes HIGH until data is entered into the FIFO.
3
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