CDP1824 Просмотр технического описания (PDF) - Intersil
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CDP1824 Datasheet PDF : 6 Pages
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CDP1824, CDP1824C
Dynamic Electrical Specifications at TA = -40oC to +85oC, VDD ±5%, Input tR, tF = 10ns, CL = 50pF, RL = 200kΩ; See Figure 2
TEST
CONDITIONS
LIMITS
CDP1824D, CDP1824E
CDP1824CD, CDP1824CE
PARAMETER
WRITE OPERATION
SYMBOL
VDD (V)
(NOTE 1) (NOTE 2)
(NOTE 1) (NOTE 2)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Write Pulse Width
tWRW
5
390
200
-
390
200
-
ns
10
180
150
-
-
-
-
ns
Data Setup Time
tDS
5
390
100
-
390
100
-
ns
10
180
50
-
-
-
-
ns
Data Hold Time
tDH
5
70
40
-
70
40
-
ns
10
35
20
-
-
-
-
ns
Chip Select Setup Time
tCS
5
425
210
-
425
210
-
ns
10
215
110
-
-
-
-
ns
Address Setup Time
tAS
5
640
500
-
640
500
-
ns
10
390
300
-
-
-
-
ns
NOTES:
1. Time required by a limit device to allow for the indicated function.
2. Time required by a typical device to allow for the indicated function. Typical values are for TA = +25oC and nominal VDD.
MA
CS
MWR
BUS
tAS
tCS
tWRW
tDS
tDH
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
NOTE: tR, tF > 1µs.
VDD
tCDR
VIH
CS VIL
DATA RETENTION
MODE
0.95 VDD
0.95 VDD
VDR
tF
(NOTE 1)
tR
(NOTE 1)
tRC
VIH
VIL
FIGURE 3. LOW VDD DATA RETENTION WAVEFORMS AND TIMING DIAGRAM
6-40
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