UPD705102 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD705102

V832™ 32-BIT MICROPROCESSOR

NEC => Renesas Technology 

µPD705102

PIN NAMES

A1 to A23:

Address Bus

BCYST:

Bus Cycle Start

BT16B:

Boot Bus Size 16-bit

CAS:

Column Address Strobe

CKE:

Clock Enable

CLKOUT:

Clock Out

CMODE:

Clock Mode

CS0 to CS7:

Chip Select

D0 to D31:

Data Bus

DCK:

Debug Clock

DDI:

Debug Data Input

DDO:

Debug Data Output

DMAAK0 to DMAAK3:

DMA Acknowledge

DMARQ0 to DMARQ3:

DMA Request

DMS:

Debug Mode Select

DRST:

Debug Reset

GND_I:

Ground

GND_O:

Ground

GND_PLL:

PLL Ground

HLDAK:

Hold Acknowledge

HLDRQ:

Hold Request

IC1:

Internally Connected

INTP00 to INTP03, INTP10 to INTP13:

Interrupt Request From Peripheral

IORD:

I/O Read

IOWR:

I/O Write

LLBEN:

Lower Lower Byte Enable

LLDQM:

Lower Lower DQ Mask enable

LUBEN:

Lower Upper Byte Enable

LUDQM:

Lower Upper DQ Mask enable

MRD:

Memory Read

MWR:

Memory Write

NMI:

Non-Maskable Interrupt Request

PORT0 to PORT4,

PORTA0 to PORTA7,

PORTB0 to PORTB7: Port

R/W:

Bus Read or Write Status

RAS:

Row Address Strobe

READY:

Ready

RESET:

Reset

RXD:

Receive Data

SCLK:

Serial Clock

SDCLKOUT:

SDRAM Clock Out

SI:

Serial Input

SO:

Serial Output

STOPAK:

Stop Acknowledge

TC:

Terminal Count

TCLR:

Timer Clear

TI:

Timer Input

TO10, TO11:

Timer Output

TRCDATA0 to TRCDATA3: Trace Data

TXD:

Transmit Data

ULBEN:

Upper Lower Byte Enable

ULDQM:

Upper Lower DQ Mask enable

UUBEN:

Upper Upper Byte Enable

UUDQM:

Upper Upper DQ Mask enable

VDD_I:

Power Supply (2.5 V)

VDD_O:

Power Supply (3.3 V)

VDD_PLL:

PLL Power Supply (2.5 V)

WE:

Write Enable

X1, X2:

Crystal Oscillator

Data Sheet U13675EJ2V1DS00

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