CY7C1061AV33-12ZXI Просмотр технического описания (PDF) - Cypress Semiconductor
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CY7C1061AV33-12ZXI Datasheet PDF : 10 Pages
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CY7C1061AV33
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
–10
10
Commercial
275
Industrial
275
Commercial/Industrial
50
Pin Configurations [1, 2]
60-ball FBGA
Top View
1
2
3
4
5
NC NC
NC
6
NC NC
NC
BLE OE A0 A1 A2 CE2
A
IO 8 BHE A3 A4 CE1 IO 0
B
IO 9 IO 10 A5
A6 IO 1 IO 2
C
VSS IO11 A17 A7
IO 3 VCC
D
VCC IO 12 NC A16 IO 4 VSS
E
IO 14 IO 13 A14 A15 IO 5 IO 6
F
IO 15 DNU A12 A13 WE IO 7
G
A18 A8
A9
A10 A11
A19
H
NC
NC NC
NC
NC NC
–12
Unit
12
ns
260
mA
260
50
mA
54-pin TSOP II
(Top View)
IO12 1
VCC 2
IO13 3
IO14 4
VSS 5
IO15 6
A4 7
A3 8
A2 9
A1 10
A0 11
BHE 12
VCCEC1
13
14
WE 15
CE2 16
A19 17
A18 18
A17 19
A16 20
A15 21
IO0 22
VCC 23
IO1 24
IO2 25
VSS 26
IO3 27
54 IO11
53 VSS
52 IO10
51 IO9
50 VCC
49 IO8
48 A5
47 A6
46 A7
45 A8
44 A9
43 NC
42 OE
41 VSS
40 DNU
39 BLE
38 A10
37 A11
36 A12
35 A13
34 A14
33 IO7
32 VSS
31 IO6
30 IO5
29 VCC
28 IO4
Notes
1. NC pins are not connected on the die.
2. DNU (Do Not Use) pins have to be left floating or tied to VSS to ensure proper operation.
Document #: 38-05256 Rev. *G
Page 2 of 10
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