CY14B104NA-BA25IT Просмотр технического описания (PDF) - Cypress Semiconductor
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CY14B104NA-BA25IT Datasheet PDF : 26 Pages
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CY14B104LA, CY14B104NA
Pinouts (continued)
Figure 3. Pin Diagram – 54-pin TSOP II pinout
NNCC[7]
A0
A1
A2
A3
A4
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A5
A6
A7
A8
A9
NC
NC
NC
1
54
2
53
3
52
4
51
5
50
6
49
7
48
8
47
9
46
10 54-pin TSOP II 45
11
(× 16)
12
44
43
13
Top View
42
14
(not to scale)
41
15
40
16
39
17
38
18
37
19
36
20
35
21
34
22
33
23
32
24
31
25
30
26
29
27
28
HSB
NC [8]
A17
A16
A15
OE
BHE
BLE
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
VCAP
A14
A13
A12
A11
A10
NC
NC
NC
Pin Definitions
Pin Name I/O Type
Description
A0–A18
A0–A17
DQ0–DQ7
DQ0–DQ15
Input
Input/Output
Address inputs. Used to select one of the 524,288 bytes of the nvSRAM for × 8 Configuration.
Address inputs. Used to Select one of the 262,144 words of the nvSRAM for × 16 Configuration.
Bidirectional data I/O lines for × 8 configuration. Used as input or output lines depending on operation.
Bidirectional data I/O lines for × 16 configuration. Used as input or output lines depending on
operation.
WE
Input Write Enable input, Active LOW. When selected LOW, data on the I/O pins is written to the specific
address location.
CE
Input Chip Enable input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input Output Enable, Active LOW. The active LOW OE input enables the data output buffers during read
cycles. I/O pins are tristated on deasserting OE HIGH.
BHE
BLE
VSS
VCC
HSB[9]
Input
Input
Ground
Byte High Enable, Active LOW. Controls DQ15–DQ8.
Byte Low Enable, Active LOW. Controls DQ7–DQ0.
Ground for the device. Must be connected to the ground of the system.
Power supply Power supply inputs to the device.
Input/Output Hardware STORE Busy (HSB). When LOW this output indicates that a Hardware STORE is in progress.
When pulled LOW external to the chip it initiates a non-volatile STORE operation. After each Hardware
and Software STORE operation, HSB is driven HIGH for a short time (tHHHD) with standard output high
current, and then a weak internal pull-up resistor keeps this pin HIGH (external pull-up resistor connection
optional).
VCAP
Power supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to
non-volatile elements.
NC
No connect No Connect. This pin is not connected to the die.
Notes
7. Address expansion for 16-Mbit. NC pin not connected to die.
8. Address expansion for 8-Mbit. NC pin not connected to die.
9. HSB pin is not available in 44-pin TSOP II (× 16) package.
Document Number: 001-49918 Rev. *L
Page 4 of 26
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