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CY14B101L-SZ25XI Просмотр технического описания (PDF) - Cypress Semiconductor

Номер в каталоге
Компоненты Описание
производитель
CY14B101L-SZ25XI
Cypress
Cypress Semiconductor Cypress
CY14B101L-SZ25XI Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CY14B101L
Pinouts
VCAP
1
A16
2
A14
3
A12
4
A7 5
A6 6
A5 7
A4 8
A3 9
A2 10
A1 11
A0 12
DQ0 13
DQ1 14
DQ2 15
VSS 16
Figure 1. Pin Diagram - 32-Pin SOIC and 48-Pin SSOP
32 VCC
31 A15
30 HSB
29 WE
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
VCAP 1
A16 2
A14 3
A12 4
A7 5
A6
6
A5
7
NC 8
A4
9
NC 10
NC 11
NC 12
VSS
13
NC 14
NC 15
DQ0 16
A3
17
A2
18
A1
19
A0
20
DQ1 21
DQ2 22
NC 23
NC 24
Top View
(not to scale)
48
VCC
47
A15
46 HSB
45 WE
44
A13
43
A8
42
A9
41
NC
40
A11
39
NC
38 NC
37
NC
36
VSS
35 NC
34 NC
33
DQ6
32
OE
31
A10
30
CE
29
DQ7
28
DQ5
27
DQ4
26
DQ3
25
VCC
Table 1. Pin Definitions
Pin Name
A0–A16
DQ0-DQ7
WE
CE
OE
VSS
VCC
HSB
VCAP
NC
Alt
I/O Type
Description
Input
Address Inputs. Used to select one of the 131,072 bytes of the nvSRAM.
Input or Output Bidirectional Data IO Lines. Used as input or output lines depending on operation.
W
Input
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the IO
pins is written to the specific address location.
E
Input
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
G
Input
Output Enable, Active LOW. The active LOW OE input enables the data output buffers during
read cycles. Deasserting OE HIGH causes the IO pins to tri-state.
Ground Ground for the Device. The device is connected to ground of the system.
Power Supply Power Supply Inputs to the Device.
Input or Output Hardware Store Busy (HSB). When LOW, this output indicates a Hardware Store is in progress.
When pulled low external to the chip, it initiates a nonvolatile STORE operation. A weak internal
pull up resistor keeps this pin high if not connected (connection optional).
Power Supply AutoStore Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
to nonvolatile elements.
No Connect No Connect. This pin is not connected to the die.
Document Number: 001-06400 Rev. *J
Page 2 of 18
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