CXK77V3211Q Просмотр технического описания (PDF) - Sony Semiconductor
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CXK77V3211Q Datasheet PDF : 18 Pages
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CXK77V3211Q
AC Electrical Characteristics
Item
Clock to output valid
Clock to output invalid
Flow-thru
Clock to output in Low-Z
Clock cycle time
Clock to output valid
Pipeline
Clock to output invalid
Clock to output in Low-Z
Clock cycle time
Clock HIGH time
Clock LOW time
Clock to output in High-Z
OE to output valid
OE to output in Low-Z
OE to output in High-Z
Setup time
Hold time
ZZ setup
ZZ hold
ZZ recovery
(VDD
=
3.3V
+10%
– 5%
,
Ta
=
0
to
+70°C)
-12
-14
Symbol
Unit
Min. Max. Min. Max.
tKQ
— 12 — 14 ns
tKQX
3 — 3 — ns
tLZ2
3 — 3 — ns
tKC
16.6 — 20 — ns
tKQ
— 7 — 8 ns
tKQX
2 — 2 — ns
tLZ2
2 — 2 — ns
tKC
13 — 15 — ns
tKH
3.5 — 4 — ns
tKL
3.5 — 4 — ns
tHZ2
— 5 — 6 ns
tOE
— 5 — 6 ns
tOLZ2
0 — 0 — ns
tOHZ2
— 5 — 6 ns
tS
2.5 — 2.5 — ns
tH
0.5 — 0.5 — ns
tZZS3
5 — 5 — ns
tZZH3
1 — 1 — ns
tZZR
20 — 20 — ns
1. All parameters are specified over the range 0 to 70°C.
2. These parameters are sampled and are not 100% tested.
3. Signal is asynchronous, however, to be recognized on any given clock the signal must meet specified setup
and hold times.
–8–
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