CXD4017R Просмотр технического описания (PDF) - Sony Semiconductor

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производитель

CXD4017R

Reception Digital Signal Processor IC for Infrared Spatial Digital Audio Communication

Sony Semiconductor 

CXD4017R

Description of Functions

1. Description of clock generator

(1) This LSI chip can generate the system clock pulse by connecting a 12.288MHz crystal oscillator to the

OSCI pin and OSCO pin.

(2) It functions as the system clock by inputting a 12.288MHz external oscillation clock pulse to the OSCI pin

while keeping the OSCO pin open.

2. Description of PLL circuit

(1) In addition to supplying the system clock pulse using the OSCI pin, this LSI requires the reproduction clock

pulse which is provided by the PLL circuit. The PLL circuit provided on the LSI chip can be used for this

purpose.

(2) If the sampling frequency of the digital audio signals which contain the input RF signal is fs, then the

reproduction clock pulse provided by the PLL circuit has a frequency of 256fs.

(3) When the PLL circuit on the LSI is used, input a low level to the EXTCK pin and VCOR pin. Furthermore,

an external lag-lead filter must be connected to the LSI between the charge pump output APCPO pin and

the VCO control voltage input APVCI pin of the PLL circuit. Ensure that the wiring involved is kept as short

as possible.

(4) When the PLL circuit on the LSI is not used, the LSI chip must be provided with an external PLL circuit.

Input a high level to the EXTCK pin and the reproduction clock pulse to the VCOR pin. The reference signal

of the PLL circuit for generating the clock pulses is output to the PLREF pin, and its frequency is set to fs.

At this time, the frequency of the clock pulse which has been input to the VCOR pin is divided by 256

inside the LSI, and the pulse with the resulting frequency is output to the PLVAR pin.

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