CXD2932AGA-2 Просмотр технического описания (PDF) - Sony Semiconductor

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производитель

CXD2932AGA-2

GPS Base Band LSI

Sony Semiconductor 

CXD2932AGA-2

Application Notes

The constants shown in the circuits below are the examples, and do not guarantee the circuit operation.

(1) TCXO input

(a) When inputting the binary-converted signal

The TCXO input signal should be 18.414MHz ± 3ppm.

Input

52

Open 53

(b) When performing the self-oscillation with the TCXO and XTCXO pins

The TCXO input signal should be 18.414MHz ± 3ppm.

For inputting the signal which is not binary converted, the signal should go through the DC cut capacitor.

0.01µF

Input

52

1MΩ

53

(2) CPU clock generation

(a) CPU clock selector

The CLKS2, CLKS1 and CLKS0 pins are used to select that the TCXO clock is used or that the self-

oscillation is performed with the CLKI and CLKO pins. Set the CLKI pin to low when the TCXO clock is used.

(CLKS[2:0] = 001: recommendation)

CLKS[2:0]

001

010

101

110

CLKI, CLKO

—

—

18 to 27MHz

12 to 18MHz

CPU frequency

TCXO × 1.0 (18.414MHz)

TCXO × 1.5 (27.671MHz)

CLKI × 1.0 (18 to 27MHz)

CLKI × 1.5 (18 to 27MHz)

(b) When performing the self-oscillation with the CLKI and CLKO pins

The crystal oscillator frequency should be within the values shown above.

22pF

58

12 to 27MHz 1MΩ

59

22pF

– 15 –

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