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CXD2951GA-2

Single Chip GPS LSI

Sony Semiconductor 

Single Chip GPS LSI

CXD2951GA-2

Description

The CXD2951GA-2 is a dedicated single chip LSI

for the GPS (Global Positioning System), satellite-

based location measurement system. This LSI

enables the configuration of a single chip system

providing a cost-effective, low-power solution.

Compared with conventional methods, position

detection time and sensitivity are substantially

improved with the use of an advanced signal

processing scheme. With the integration of both the

Radio and baseband blocks into a single CMOS IC,

the CXD2951GA-2 is ideal for use in automotive,

cellular handset, handheld navigation, mobile

computing and other location-based applications.

Features

• 12-channel GPS receiver capable of simultaneously

receiving 12 satellites

• Reception frequency: 1575.42MHz

(L1 band, CA code)

• Reference clock (TCXO) frequency:

18.414MHz (GPS, Sony standard),

The unique frequency of major applications is available,

such as GSM and W-CDMA. (optional)

13.000MHz (GSM),

14.400MHz (CDMA),

16.368MHz (GPS),

19.800MHz (PDC/CDMA),

26.000MHz (GSM)

• 32 bits RISC CPU (ARM7TDMI)

• 288K-bytes Program ROM

• 72K-bytes Data RAM

Power is supplied only to 8K-byte Data RAM while

in backup mode.

• System power management

• 1-channel UART

• Internal RTC (Real Time Clock)

• 10-bit successive approximation system A/D

converter, A/D data available on NMEA messages

• All-in-view positioning

• Communication format: Supports NMEA-0183

• 1 PPS output

• Supports assisted-GPS for cellular (optional)

176 pin LFLGA (Plastic)

Radio

• Image Rejection Mixer

• VCO Tank

• IF Filters

Structure

Silicon gate CMOS IC

Absolute Maximum Ratings

• Supply voltage I/O IOVDD –0.5 to +4.6 V

• Supply voltage core CVDD –0.5 to +2.5 V

• Supply voltage radio VDD –0.5 to +2.5 V

• Input voltage

VI

–0.5 to +6 V

• Output voltage

VO

–0.5 to +6 V

• Operating temperature Topr –40 to +85 °C

• Storage temperature Tstg –50 to +150 °C

Recommended Operating Conditions

• Supply voltage I/O IOVDD 3.0 to 3.6

V

∗ Under operation with internal ROM, using no

external expansion bus:

IOVDD 2.6 to 3.6

V

∗ Under operation in backup mode:

BKUPIOVDD 2.5 (Min.) V

• Supply voltage core CVDD 1.62 to 1.98 V

• Supply voltage radio VDD 1.62 to 1.98 V

• Operating temperature Topr –40 to +85 °C

Input/Output Pin Capacitance (Baseband)

• Input capacitance

CIN

9 (Max.) pF

• Output capacitance COUT 11 (Max.) pF

• I/O capacitance

CI/O

11 (Max.) pF

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

–1–

E04445A49

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