CXA3186 Просмотр технического описания (PDF) - Sony Semiconductor
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CXA3186 Datasheet PDF : 23 Pages
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CXA3185/3186N
∗1 Measured value for untuned inputs.
∗2 Noise figure is the direct-reading value of NF meter in DSB.
∗3 Desired signal (fD) input level is –30 dBm. Undesired signal (fUD) is 100 kHz, 30 % AM.
The measurement value is undesired signal level, it measured with a spectrum analyzer at S/I=46 dBm.
∗4 Value when the PLL is not operating.
PLL Block
Item
Symbol
Measurement conditions
Min.
Typ.
CL and DA pins
“H” level input voltage VIH
3
“L” level input voltage VIL
GND
“H” level input current IIH
VIH = VCC
0
“L” level input current IIL
VIL = GND
–1
CE pins
“H” level input voltage VIHE
3
“L” level input voltage VILE
GND
“H” level input current IIHE
VIHE=VCC
100
“L” level input current IILE
VILE=GND
–30
CPO (charge pump)
Output current
ICPO
±35
±50
Leak current
LeakCP
LOCK
“H” output voltage VLOCKH When locked
VCC–0.5
“L” output voltage VLOCKL When unlocked
0
REFOSC
Oscillator
FXTOSC
3
frequency range
Input capacitance
CXTOSC
17.5
19
Drive level
VXTOSC
200
400
BVL, BVH, BU (Band SW)
Output current
IBS1
When ON
Saturation voltage VSAT1 When ON Sink current = 20 mA
100
Leak current
LeakBS1 When OFF
0.5
FMT (Band SW)
Output current
IBS2
When ON
Saturation voltage VSAT2 When ON Sink current = 5 mA
75
Leak current
LeakBS2 When OFF
0.03
Bus timing
Data setup time
tSD
See Timing Chart on Page 15
300
Data hold time
tHD
See Timing Chart on Page 15
600
Enable waiting time tWE
See Timing Chart on Page 15
300
Enable setup time tSE
See Timing Chart on Page 15
300
Enable hold time
tHE
See Timing Chart on Page 15
600
Max. Unit
VCC
V
1.5
V
–0.1
µA
–2
µA
VCC
V
1.5
V
130
µA
–45
µA
±75
µA
30
nA
VCC
V
0.5
V
12
MHz
20.5
pF
mVp-p
–25
mA
200
mV
3
µA
–7
mA
150
mV
0.1
µA
ns
ns
ns
ns
ns
—7—
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