CXA2013 Просмотр технического описания (PDF) - Sony Semiconductor

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производитель

CXA2013

EIAJ Sound Multiplexing Decoder

Sony Semiconductor 

CXA2013M

• I2C data write (Write from I2C controller to the IC)

SDA

MSB

L during Write

Hi-Z

MSB

LSB

Hi-Z

SCL

S

MSB

1

2

3

4

5

6

7

8

9

1

8

9

Address

LSB

Hi-Z

ACK

Sub Address

ACK

Hi-Z

1

8

9

1

8

9

DATA (n)

ACK

DATA (n + 1)

ACK

DATA (n + 2)

Hi-Z

Hi-Z

8

9

1

8

9

DATA

ACK

DATA

P

ACK

∗ Data can be transferred in 8-bit units to be

set as required.

Sub address is incremented automatically.

• I2C data read (Read from the IC to I2C controller)

SDA

H during Read

Hi-Z

SCL

1

S

6

7

8

9

1

Address

ACK

7

8

9

DATA

P

ACK

• Read timing

MSB

LSB

IC output SDA

SCL

9

1

2

3

4

5

6

7

8

9

Read timing

ACK

DATA

ACK

∗ Data Read is performed during SCL rise.

– 20 –

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