CDB4207 Просмотр технического описания (PDF) - Cirrus Logic

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Компоненты Описание

производитель

CDB4207

Low-power, 4-in / 6-out HD Audio Codec with Headphone Amp

Cirrus Logic 

CS4207

LIST OF FIGURES

Figure 1.Typical Connection Diagram - Desktop System ......................................................................... 11

Figure 2.Typical Connection Diagram - Portable System ......................................................................... 12

Figure 3.Output Test Load, Headphone Out ............................................................................................. 18

Figure 4.Output Test Load, Line Out ......................................................................................................... 18

Figure 5.Output Test Load, Headphone Out ............................................................................................. 20

Figure 6.Output Test Load, Line Out ......................................................................................................... 20

Figure 7.Digital MIC Interface Timing ........................................................................................................ 22

Figure 8.PS-SettingsReset Behavior ........................................................................................................ 28

Figure 9.Jack Presence Detect Circuit ...................................................................................................... 31

Figure 10.Software Programming Model .................................................................................................. 33

Figure 11.Single-Ended Input Filter ........................................................................................................ 139

Figure 12.Pseudo-Differential Input Filter ............................................................................................... 140

Figure 13.Differential Input Filter ............................................................................................................. 141

Figure 14.Differential to Single-Ended Output Filter ............................................................................... 142

Figure 15.Passive Single-Ended Output Filter ........................................................................................ 142

LIST OF TABLES

Table 1. Register Settings Across Reset Conditions ................................................................................ 29

Table 2. Device Node ID Summary ........................................................................................................... 34

Table 3. Pin Configuration Register Defaults ............................................................................................ 35

Table 4. Stream Format Examples ......................................................................................................... 138

Table 5. Line In 1/Mic In 2 Input Topology Register Settings .................................................................. 139

Table 6. Mic In 1/Line In 2 Input Topology Register Settings .................................................................. 139

DS880F4

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