CP2400-GM Просмотр технического описания (PDF) - Silicon Laboratories
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CP2400-GM Datasheet PDF : 110 Pages
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CP2400/1/2/3
Table 3.3. Reset Electrical Characteristics
VDD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameters
Conditions
Min
Typ
RST Input High Voltage
RST Input Low Voltage
0.7 x VDD
—
—
—
RST Input Pullup Current
RST = 0 V, VDD = 1.8 V
—
4
RST = 0 V, VDD = 3.6 V
—
20
VDD Ramp Time for Power On1
VDD Ramp from 0–1.8 V
—
—
Power on Reset Delay (TPORDelay)
from Start of Ramp until the Reset
Complete Interrupt
VDD = 1.8 V
VDD = 3.0 V
VDD = 3.6 V
—
1200
—
660
—
575
Required RST Low Time to
guarantee a System Reset (TRST)
See Note 2
15
—
Startup Delay from Reset De-
asserted until the Reset Complete
Interrupt (TSTARTUP)
Pin Reset
—
90
Notes:
1. There is no restriction on VDD ramp time if the RST pin is toggled at the end of the ramp.
2. If the RST pin is held low for a shorter time period, a device reset may occur.
Max UNITS
—
V
0.3 x VDD
V
—
µA
30
1
ms
—
µs
900
—
—
µs
100
µs
Table 3.4. Power Management Electrical Specifications
VDD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
RAM Preservation Mode Wake-Up From the falling edge of CLK until
10
ns
Time
host interface ready
ULP Mode Wake-Up Time (from
the falling edge of NSS/PWR to
the reset complete interrupt)
Port Match or SmaRTClock Wakeup
NSS/PWR Pin Wakeup
3
7
—
—
4
RTC
8
Cycles
Table 3.5. Internal Oscillator Electrical Characteristics
VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified; Using factory-calibrated settings.
Parameter
Conditions
Min
Typ
Max
Oscillator Frequency
–40 to +85 °C,
VDD = 1.8–3.6 V
15
20
25
Oscillator Supply Current (from VDD)
25 °C
—
50
—
Units
MHz
µA
Table 3.6. LCD Electrical Characteristics
VDD = 1.8 to 3.6 V; TA = –40 to +85 °C unless otherwise specified.
Parameter
Conditions
Charge Pump Output Voltage Error
Min Typ Max Units
—
±30
—
mV
16
Rev. 1.0
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