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CMPWR150SF Просмотр технического описания (PDF) - ON Semiconductor

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CMPWR150SF
ON-Semiconductor
ON Semiconductor ON-Semiconductor
CMPWR150SF Datasheet PDF : 15 Pages
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CMPWR150
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL PARAMETER
CONDITIONS
VOUT
Regulator Output Voltage 0mA < ILOAD < 500mA
IOUT
Regulator Output Current
VCCSEL Select Voltage
Regulator Enabled
VCCDES Deselect Voltage
Regulator Disabled
VCCHYST Hysteresis Voltage
Hysteresis, See Note 2
ISC
Short-circuit Output Current VCC=5V, VOUT=0V
I
RCC
VCC Pin Reverse Leakage VOUT=3.3V; VCC = 0.0V
V
R LOAD
V
R LINE
I
CC
Load Regulation
Line Regulation
Quiescent Supply Current
V =5V, I =50mA to 500mA
CC
LOAD
V =4.5 to 5.5V, I =5mA
CC
LOAD
V > V , I =0mA
CC
CCSEL LOAD
V >V >V
CCDES
CC
OUT
V >V
OUT
CC
I
Ground Pin Current
GND
Regulator Disabled, Note 3
V =5V, I =5mA, Note 3
CC
LOAD
V =5V, I =500mA, Note 3
CC
LOAD
ROH
Drive Pull-up Resistance
R to V , V > V
PULLUP
CC CC
CCSEL
ROL
Drive Pull-down Resistance RPULLDOWN to GND, VCCDES > VCC
TDH
Drive High Delay
T
DL
Drive Low Delay
C =1nF, V T < 100ns
DRIVE
CC RISE
C =1nF, V T < 100ns
DRIVE
CC FALL
MIN TYP MAX UNITS
3.135 3.300 3.465
V
500 800
mA
4.35 4.45
V
3.90 4.10
V
0.25
V
1200
mA
x5
50
µA
75
mV
2
mV
1.0
3.0
mA
0.15 0.25 mA
0.01 0.02 mA
0.15 0.30 mA
1.0
2.5
mA
1.2
3.0
mA
100 400
Ω
200 400
Ω
x1.0
µS
0.2
µS
Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
Note 2: The hysteresis defines the maximum level of acceptable disturbance on VCC during switching. It is recommended that
the VCC source impedance be kept below 0.25Ω to ensure the switching disturbance remains below the hysteresis
during select/deselect transitions. An input capacitor may be required to help minimize the switching transient.
Note 3: Ground pin current consists of controller current (0.15mA) and regulator current if enabled. The controller always draws
0.15mA from either VCC or VOUT, whichever is greater. All regulator current is supplied exclusively from VCC. At high load
currents a small increase occurs due to current limit protection circuitry.
Rev. 3 | Page 5 of 15 | www.onsemi.com

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