CMPWR150SF Просмотр технического описания (PDF) - ON Semiconductor

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производитель

CMPWR150SF

500mA/3.3V SmartOR™ Power Regulator

ON Semiconductor 

Typical Application Circuit

CMPWR150

Simplified Electrical Schematic

PIN DESCRIPTIONS

PIN(S)

1

2

5-8

3

4

NAME

N.C.

VCC

GND

VOUT

DESCRIPTION

This is a no-connect pin.

VCC is the power source for the internal regulator and is monitored continuously by an internal controller

circuit. Whenever VCC exceeds VCCSEL (4.35V typically), the internal regulator (500mA max) will be enabled

and deliver a fixed 3.3V at VOUT. When VCC falls below VCCDES (4.10V typically) the regulator will be

disabled. Internal loading on this pin is typically 1.0mA when the regulator is enabled, which decreases to

0.15mA whenever the regulator is disabled. If VCC falls below the voltage on the VOUT pin the VCC loading

will further decrease to only a few microamperes. During a VCC power up sequence, there will be an

effective step increase in VCC line current when the regulator is enabled. The amplitude of this step

increase will depend on the DC load current and any necessary current required for charging/discharging

the load capacitance. This line current transient will cause a voltage disturbance at the VCC pin. The

magnitude of the disturbance will be directly proportional to the effective power supply source impedance

being delivered to the VCC input. To prevent chatter during Select and Deselect transitions, a built-in

hysteresis voltage of 250mV has been incorporated. It is recommended that the power supply connected

to the VCC input have a source resistance of less than 0.25Ω to minimize the event of chatter during the

enabling/disabling of the regulator. An input filter capacitor in close proximity to the VCC pin will reduce the

effective source impedance and help minimize any disturbances. If the VCC pin is within a few inches of

the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor in the range of

1µF to 10µF will ensure adequate filtering.

GND is the negative reference for all voltages. The current that flows in the ground connection is very low

(typically 1.0mA) and has minimal variation over all load conditions.

VOUT is the regulator output voltage connection used to power the load. An output capacitor of ten

microfarads is used to provide the necessary phase compensation, thereby preventing oscillation. The

capacitor also helps to minimize the peak output disturbance during power supply changeover.

When VCC falls below VOUT, then VOUT will be used to provide the necessary quiescent current for the

internal reference circuits. This ensures excellent start-up characteristics for the regulator.

DRIVE

DRIVE is an active LOW logic output intended to be used as the control signal for driving an external

PFET whenever the regulator is disabled. This will allow the voltage at VOUT to be powered from an

auxiliary supply voltage (3.3V).

The Drive pin is pulled HIGH to VCC whenever the regulator is enabled. This ensures that the auxiliary

remains isolated during normal regulator operation.

Rev. 3 | Page 2 of 15 | www.onsemi.com

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