CGY2030M Просмотр технического описания (PDF) - Philips Electronics

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CGY2030M

DECT 500 mW power amplifier

Philips Electronics 

Philips Semiconductors

DECT 500 mW power amplifier

Product specification

CGY2030M

APPLICATION INFORMATION

The CGY2030M is operated and tested in accordance with

the circuit diagram shown in Fig.4. Supply voltage

switching is achieved by two bipolar PNP transistors.

One transistor switches the first and second stages and

the other switches the third and fourth stages.

By switching on the last amplifier stages with some delay

compared to the first stages, it is possible to get the last

stages already self-biased before their supply voltage has

reached its steady state value. This enables smooth power

up-ramping without any power overshoot. A simpler drain

switching circuit can be used if the amplifier is operated

with negative biasing of the pins VGG1 and VGG2.

handbook, full pagewidth

PA input

VGG1

3.3 Ω

10

68

100

nF

pF

µF

Vbat

10 pF

BC858

TRL1(1)

330 Ω

22 pF

DTC11YE

1Ω

6.8 pF

TRL2(2)

10 kΩ

ramp

VGG2

VDD1 GND GND VDD2 GND GND GND VGG2

8

7

6

5

4

3

2

1

CGY2030M

9

10 11 12 13 14 15 16

RFI VGG1 GND GND VDD3 GND GND RFO/

Zc = 50 Ω

VDD4

TRL4(4)

10 kΩ

10 pF

1.5 pF

Zc = 50 Ω

1.8 pF TRL5(5)

100 Ω

TRL3(3)

PA output

BC807

100

6.8

nF

pF

MGG166

Thickness: 0.8 mm; substrate: FR4; εr = 4.7.

(1) TRL1: width = 500 µm; length = 11200 µm.

(2) TRL2: width = 500 µm; length = 7770 µm.

(3) TRL3: width = 300 µm; length = 15450 µm.

(4) TRL4: width = 1600 µm; length = 12000 µm.

(5) TRL5: width = 1600 µm; length = 11000 µm.

Fig.4 Evaluation board schematic.

1997 Jan 17

6

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