CDP1824C/3 Просмотр технического описания (PDF) - Intersil
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CDP1824C/3 Datasheet PDF : 5 Pages
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CDP1824/3, CDP1824C/3
Read Cycle Dynamic Electrical Specifications Input tR, tF ≤ 15ns, CL = 50pF
TEST
CONDITIONS
LIMITS
-55oC, +25oC
+125oC
PARAMETER
SYMBOL
VDD
(V)
MIN
MAX
MIN
MAX
Access Time From Address Change
tAA
5
10
-
610
-
825
-
320
-
375
Access Time From Chip Select
tDOA
5
10
-
610
-
825
-
320
-
375
Output Active From MRD
tAM
5
10
-
610
-
825
-
320
-
375
UNITS
ns
ns
ns
ns
ns
ns
MRD
MA
CS
tAM
(NOTE 1)
tAA
DATA OUT
tDOA
(NOTE 1)
HIGH IMPEDANCE
NOTE:
1. Minimum timing for valid data output longer times will initiate an earlier, but invalid output.
FIGURE 1. READ CYCLE TIMING DIAGRAM
44
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