CDP1822C/3 Просмотр технического описания (PDF) - Intersil
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CDP1822C/3 Datasheet PDF : 5 Pages
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CDP1822C/3
Data Retention Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
VDR
(V)
VDD
(V)
LIMITS
+25oC, -55oC
+125oC
MIN
MAX
MIN
MAX
UNITS
Minimum Data Retention Voltage
(Note 1)
VDR
-
-
-
2
-
2.5
V
Data Retention Quiescent Current
IDD
2
-
-
70
-
380
µA
(Note 1)
Chip Deselect to Data Retention Time
tCDR
-
5
450
-
650
-
ns
-
10
Recovery to Normal Operation Time
tRC
5
5
450
-
650
-
ns
NOTE:
1. Limits designate 100% testing. All other limits are designer’s parameters under given test conditions and do not represent 100% testing.
VDD
CS2
tCDR
DATA RETENTION
MODE
0.95 VDD
0.95 VDD
VDR
tF
tR
VIH
VIL
tRC
VIH
VIL
FIGURE 4. LOW VDD DATA RETENTION TIMING WAVEFORMS
VDD
A3 1
A2 2
A1 3
A0 4
A5 5
A6 6
A7 7
8
R A8
9
10
2kΩ
A8
11
R = 2kΩ ±20%
22
VDD
21 A4
20 01
19 A9
18 A11
17 A10
R
16
VDD
15
A8 2kΩ
R
14
VDD
13
A8 2kΩ
R
12
VDD
2kΩ
PACKAGE
D
TEMPERATURE
125oC
DURATION
160 Hrs
VDD
7V
0
01
A0
A1
1.6 2.2 5.0
6.8 7.2
10.0µs
VDD
0
VDD
0
VDD
0
FIGURE 5. DYNAMIC/OPERATING BURN-IN CIRCUIT AND TIMING DIAGRAM
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