CDP1802A, CDP1802AC, CDP1802BC
TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)
STATE I N
SYMBOL
OPERATION
DATA
BUS
MEMORY
ADDRESS MRD
S1 7 9
MARK
(X, P) → T, MR2; P → X;
R2 - 1 → R2
T
R2
1
A
REQ
0→Q
Float
RP
1
B
SEQ
1→Q
Float
RP
1
C
ADCl
MRP + D + DF → DF, D;
RP + 1
MRP
RP
0
D
SDBl
MRP - D - DFN → DF, D;
MRP
RP
0
RP + 1
E
SHLC MSB(D) → DF; DF → LSB(D) Float
RP
1
F
SMBl
D - MRP - DFN → DF, D;
MRP
RP
0
RP + 1
8 0-F
GLO
RN.0 → D
RN.0
RN
1
9 0-F
GHl
RN.1 → D
RN.1
RN
1
A 0-F
PLO
D → RN.0
D
RN
1
B 0-F
PHI
D → RN.1
D
RN
1
S1#1 C 0 - 3, Long Branch Taken: MRP → B; RP + 1 →
MRP
RP
0
8-B
RP
#2
Taken: B → RP.1;
M(RP + 1) RP + 1
0
MRP → RP.0
S1#1
Not Taken: RP + 1 → RP
MRP
RP
0
#2
Not Taken: RP + 1 → RP
M(RP + 1) RP + 1
0
S1#1
#2
S1#1
#2
5
Long Skip Taken: RP + 1 → RP
MRP
RP
0
6
7
Taken: RP + 1 → RP
M(RP + 1) RP + 1
0
C
Not Taken: No Operation
MRP
RP
0
D
E
Not Taken: No Operation
MRP
RP
0
F
S1#1
4
NOP
No Operation
MRP
RP
0
#2
No Operation
MRP
RP
0
S1 D 0 - F
SEP
N→P
NN
RN
1
E 0-F
SEX
N→X
NN
RN
1
S1 F 0
LDX
MRX → D
MRX
RX
0
1
OR
MRX OR D → D
2
AND
MRX AND D → D
3
XOR
MRX XOR D → D
4
ADD
MRX + D → DF, D
5
SD
MRX - D → DF, D
7
SM
D - MRX → DF, D
MRX
RX
0
6
SHR
LSB(D) → DF; 0 → MSB(D)
Float
RX
1
MWR
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
N
LINES
0
NOTES
Fig. 7
0
Fig. 6
0
Fig. 6
0
Fig. 8
0
Fig. 8
0
Fig. 6
0
Fig. 8
0
Fig. 6
0
Fig. 6
0
Fig. 6
0
Fig. 6
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 9
0
Fig. 6
0
Fig. 6
0
Fig. 8
0
Fig. 8
0
Fig. 6
3-29