CAT24C32 Просмотр технического описания (PDF) - Catalyst Semiconductor => Onsemi

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CAT24C32

32-Kb I2C CMOS Serial EEPROM

Catalyst Semiconductor => Onsemi 

Figure 1. Start/Stop Timing

CAT24C32

SCL

SDA

START

CONDITION

Figure 2. Slave Address Bits

STOP

CONDITION

1

0

1

0 A2 A1 A0 R/W

DEVICE ADDRESS

Figure 3. Acknowledge Timing

SCL FROM

MASTER

BUS RELEASE DELAY (TRANSMITTER)

1

8

DATA OUTPUT

FROM TRANSMITTER

DATA OUTPUT

FROM RECEIVER

START

ACK DELAY (≤ tAA)

BUS RELEASE DELAY (RECEIVER)

9

ACK SETUP (≥ tSU:DAT)

Figure 4. Bus Timing

tF

SCL

tSU:STA

SDA IN

SDA OUT

tHIGH

tR

tLOW

tLOW

tHD:DAT

tHD:STA

tSU:DAT

tAA

tDH

tSU:STO

tBUF

© 2007 by Catalyst Semiconductor, Inc.

Characteristics subject to change without notice

5

Doc No. 1101, Rev. G

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