CAT24AC128 Просмотр технического описания (PDF) - Catalyst Semiconductor => Onsemi
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CAT24AC128 Datasheet PDF : 11 Pages
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CAT24AC128
Figure 10. Sequential Current Address Read Timing
S
T
BUS ACTIVITY: A SLAVE
MASTER R ADDRESS
T
SDA LINE S
A
C
K
DATA n
DATA n+1
DATA n+2
A
A
A
C
C
C
K
K
K
S
T
DATA n+x
O
P
P
N
O
A
C
K
Figure 11. Sequential Random Address Read Timing
S
T
BUS ACTIVITY: A
MASTER R
T
SDA LINE S
SLAVE
ADDRESS
BYTE ADDRESS
A15–A8
A7–A0
**
A
A
C
C
K
K
S
T
A SLAVE
R ADDRESS
T
S
A
A
C
C
K
K
DATA n
DATA n+1
DATA n+2
A
A
A
C
C
C
K
K
K
S
T
DATA n+x
O
P
P
N
O
A
C
K
ORDERING INFORMATION
24AC128
Rev A(2)
Blank: 2.5V - 5.5V
1.8: 1.8V - 5.5V
Die Revision
L: PDIP (Lead-free, Halogen-free)
X: SOIC, EIAJ (Lead-free, Halogen-free)
W: SOIC, JEDEC (Lead-free, Halogen-free)
Y: TSSOP (Lead-free, Halogen-free)
GL: PDIP (Lead-free, Halogen-free, NiPdAu lead plating)
GX: SOIC, EIAJ (Lead-free, Halogen-free, NiPdAu lead plating)
GW: SOIC, JEDEC (Lead-free, Halogen-free, NiPdAu lead plating)
GY: TSSOP (Lead-free, Halogen-free, NiPdAu lead plating)
Notes:
(1) The device used in the above example is a CAT24AC128KI-1.8TE13 (SOIC, Industrial Temperature, 1.8 Volt to 5.5 Volt
Operating Voltage, Tape & Reel)
(2) Product die revision letter is marked on top of the package as a suffix to the production date code (e.g., AYWWA). For additional
information, please contact your Catalyst sales office.
Doc. No. 1028, Rev. I
8
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