CAT22C10 Просмотр технического описания (PDF) - ON Semiconductor

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CAT22C10

256-Bit Nonvolatile CMOS Static RAM

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CAT22C10

BLOCK DIAGRAM

EEPROM ARRAY

A0

A1

A2

A3

A4

A5

STORE

RECALL

ROW

STATIC RAM

SELECT

ARRAY

COLUMN SELECT

CONTROL

LOGIC

READ/WRITE

CIRCUITS

STORE

RECALL

CS WE I/O0 I/O1 I/O2 I/O3

MODE SELECTION(1)(2)(3)

Mode

CS

Standby

H

RAM Read

L

RAM Write

L

(EEPROM→RAM)

X

(EEPROM→RAM)

H

(RAM→EEPROM)

X

(RAM→EEPROM)

H

Input

WE

RECALL

X

H

H

H

L

H

H

L

X

L

H

H

X

H

STORE

H

H

H

H

H

L

L

I/O

Output High-Z

Output Data

Input Data

Output High-Z RECALL

Output High-Z RECALL

Output High-Z STORE

Output High-Z STORE

POWER-UP TIMING(4)

Symbol

VCCSR

Parameter

VCC Slew Rate

Min.

0.5

Max.

0.005

Note:

(1) RECALL signal has priority over STORE signal when both are applied at the same time.

(2) STORE is inhibited when RECALL is active.

(3) The store operation is inhibited when VCC is below ≈ 3.0V.

(4) This parameter is tested initially and after a design or process change that affects the parameter.

Units

V/ms

Doc. No. MD-1082, Rev. R

© 2009 SCILLC. All rights reserved.

2

Characteristics subject to change without notice.

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