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CAT1021

Supervisory Circuits with EEPROM Serial 2k-bit I2C Manual Reset and Watchdog Timer

ON Semiconductor 

CAT1021, CAT1022,

CAT1023

Supervisory Circuits with

EEPROM Serial 2k-bit I2C

Manual Reset and

Watchdog Timer

www.onsemi.com

Description

The CAT1021, CAT1022 and CAT1023 are complete memory and

supervisory solutions for microcontroller−based systems. A EEPROM

Serial 2k−bit I2C memory and a system power supervisor with

brown−out protection are integrated together in low power CMOS

technology. Memory interface is via a 400 kHz I2C bus.

SOIC−8

CASE 751BD

TSSOP−8

CASE 948S

The CAT1021 and CAT1023 provide a precision VCC sense circuit

and two open drain outputs: one (RESET) drives high and the other

(RESET) drives low whenever VCC falls below the reset threshold

voltage. The CAT1022 has only a RESET output and does not have a

Write Protect input. The CAT1021 also has a Write Protect input

(WP). Write operations are disabled if WP is connected to a logic high.

MSOP−8

CASE 846AD

TDFN−8

CASE 511AL

All supervisors have a 1.6 second watchdog timer circuit that resets

a system to a known state if software or a hardware glitch halts or

“hangs” the system. For the CAT1021 and CAT1022, the watchdog

ORDERING INFORMATION

timer monitors the SDA signal. The CAT1023 has a separate watchdog

timer interrupt input pin, WDI.

For Ordering Information details, see page 13.

The power supply monitor and reset circuit protect memory and

system controllers during power up/down and against brownout

conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V

systems. If power supply voltages are out of tolerance reset signals

become active, preventing the system microcontroller, ASIC or

peripherals from operating. Reset signals become inactive typically

200 ms after the supply voltage exceeds the reset threshold level. With

both active high and low reset signals, interface to microcontrollers

and other ICs is simple. In addition, the RESET pin or a separate input,

MR, can be used as an input for push−button manual reset capability.

The on−chip, 2k−bit EEPROM memory features a 16−byte page. In addition, hardware data protection is provided by a VCC

sense circuit that prevents writes to memory whenever VCC falls below the reset threshold or until VCC reaches the reset

threshold during power up.

Available packages include an surface mount 8−pin SOIC, 8−pin TSSOP, 8−pin TDFN and 8−pin MSOP packages. The

TDFN package thickness is 0.8 mm maximum. TDFN footprint options are 3 x 3 mm.

Features

• Precision Power Supply Voltage Monitor

♦ 5 V, 3.3 V and 3 V Systems

♦ Five Threshold Voltage Options

• Watchdog Timer

• Active High or Low Reset

♦ Valid Reset Guaranteed at VCC = 1 V

• 400 kHz I2C Bus

• 2.7 V to 5.5 V Operation

• Low Power CMOS Technology

• 16−Byte Page Write Buffer

• Built−in Inadvertent Write Protection

♦ WP Pin (CAT1021)

• 1,000,000 Program/Erase Cycles

• Manual Reset Input

• 100 Year Data Retention

• Industrial and Extended Temperature Ranges

• 8−pin SOIC, TSSOP, MSOP or TDFN (3 x 3 mm

Foot−print) Packages

♦ TDFN Max Height is 0.8 mm

• These Devices are Pb−Free, Halogen Free/BFR Free

and are RoHS Compliant

© Semiconductor Components Industries, LLC, 2011

1

May, 2018 − Rev. 19

Publication Order Number:

CAT1021/D

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