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C8051F380 Просмотр технического описания (PDF) - Silicon Laboratories

Номер в каталоге
Компоненты Описание
производитель
C8051F380
Silabs
Silicon Laboratories Silabs
C8051F380 Datasheet PDF : 321 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
C8051F380/1/2/3/4/5/6/7/C
Table of Contents
1. System Overview ..................................................................................................... 16
2. C8051F34x Compatibility ........................................................................................ 20
2.1. Hardware Incompatibilities ................................................................................ 21
3. Pinout and Package Definitions ............................................................................. 22
4. Typical Connection Diagrams ................................................................................ 34
4.1. Power ............................................................................................................ 34
4.2. USB ............................................................................................................ 36
4.3. Voltage Reference (VREF)................................................................................ 36
5. Electrical Characteristics ........................................................................................ 37
5.1. Absolute Maximum Specifications..................................................................... 37
5.2. Electrical Characteristics ................................................................................... 38
6. 10-Bit ADC (ADC0, C8051F380/1/2/3/C only) ......................................................... 46
6.1. Output Code Formatting .................................................................................... 47
6.3. Modes of Operation ........................................................................................... 50
6.3.1. Starting a Conversion................................................................................ 50
6.3.2. Tracking Modes......................................................................................... 51
6.3.3. Settling Time Requirements...................................................................... 52
6.4. Programmable Window Detector....................................................................... 56
6.4.1. Window Detector Example........................................................................ 58
6.5. ADC0 Analog Multiplexer (C8051F380/1/2/3/C only) ........................................ 59
7. Voltage Reference Options ..................................................................................... 62
8. Comparator0 and Comparator1.............................................................................. 64
8.1. Comparator Multiplexers ................................................................................... 71
9. Voltage Regulators (REG0 and REG1)................................................................... 74
9.1. Voltage Regulator (REG0)................................................................................. 74
9.1.1. Regulator Mode Selection......................................................................... 74
9.1.2. VBUS Detection ........................................................................................ 74
9.2. Voltage Regulator (REG1)................................................................................. 74
10. Power Management Modes................................................................................... 76
10.1. Idle Mode......................................................................................................... 76
10.2. Stop Mode ....................................................................................................... 77
10.3. Suspend Mode ................................................................................................ 77
11. CIP-51 Microcontroller........................................................................................... 79
11.1. Instruction Set.................................................................................................. 80
11.1.1. Instruction and CPU Timing .................................................................... 80
11.2. CIP-51 Register Descriptions .......................................................................... 85
12. Prefetch Engine...................................................................................................... 88
13. Memory Organization ............................................................................................ 89
13.1. Program Memory............................................................................................. 91
13.2. Data Memory ................................................................................................... 91
13.3. General Purpose Registers ............................................................................. 92
13.4. Bit Addressable Locations ............................................................................... 92
13.5. Stack ............................................................................................................ 92
Rev. 1.4
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