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UDA1344TS

Low-voltage low-power stereo audio CODEC with DSP features

Philips Electronics 

Philips Semiconductors

Low-voltage low-power stereo audio

CODEC with DSP features

Product specification

UDA1344TS

L3 mode

The UDA1344TS is set to the L3 mode by setting both

pins MC1 and MC2 to LOW level.

The static pins in this mode are used for:

• ADC output overload detection

• L3 interface signal input

• ADC input voltage selection.

The controllable features via the L3 interface and the

definition of the control registers are given in

Section “L3 interface”.

PINNING DEFINITION

The pinning definition in the L3 mode is given in Table 11.

Table 11 Pinning definition in L3 mode

PIN

MP1

MP2

MP3

MP4

MP5

FUNCTION

ADC output overload detection

L3MODE input

L3CLOCK input

L3DATA input

ADC input voltage selection:

1 V (RMS) or 2 V (RMS)

ADC OUTPUT OVERLOAD DETECTION

In practice the output is used to indicate whenever the

output data, in either the left or right channel, is greater

than −1 dB (actual figure is −1.16 dB) of the maximum

possible digital swing. When this condition is detected

pin MP1 is forced to HIGH level for at least 512fs cycles

(11.6 ms at fs = 44.1 kHz). This time-out is reset for each

infringement.

ADC INPUT VOLTAGE SELECTION

In the L3 mode pin MP5 is used to select 0 or 6 dB gain.

Table 12 Levels for pin MP5

PIN MP4

LOW

HIGH

SELECTION

0 dB gain

6 dB gain

2001 Jun 29

10

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