SAA56XX Просмотр технического описания (PDF) - Philips Electronics
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SAA56XX Datasheet PDF : 112 Pages
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Philips Semiconductors
Enhanced TV microcontrollers with
On-Screen Display (OSD)
Product specification
SAA56xx
SYMBOL
A15_BK
ROMBK0 to
ROMBK2
RAMBK0 to
RAMBK1
INTD
PIN
33
58 to 56
TYPE
DESCRIPTION
O address line A15 when using ROMBK outputs for external program ROM
access
O ROMBK SFR selection bits for external program ROM access >64 kbytes
51, 50
61
O RAMBK SFR selection bits for external program SRAM data storage
>64 kbytes. Use A0 to A14 and A15_BK as lower address bits.
I interrupt disable for emulation (internal pull-up)
Note
1. A15_LN, A16_LN and A17_LN form a linear address space and may be used as an alternative to A15_BK (pin 33)
and ROMBK2 to ROMBK0 (pins 56, 57 and 58) for external program ROM access.
7 MICROCONTROLLER
The functionality of the microcontroller used in this device
is described here with reference to the industry standard
80C51 microcontroller. A full description of its functionality
can be found in “Handbook IC20 80C51-Based 8-bit
Microcontrollers”.
7.1 Microcontroller features
• 80C51 microcontroller core standard instruction set and
timing
• 0.5 µs machine cycle
• Maximum 192K × 8-bit Program ROM
• Maximum of 14K × 8-bit data and display RAM
• 15-level interrupt controller with individual
enable/disable and two level priority
• Up to six external interrupts with programmable
detection characteristics
• Three 16-bit Timer/counter registers
• Watchdog Timer
• Auxiliary RAM page pointer
• 16-bit Data pointer
• Idle, Standby and Power-down modes
• 32 general I/O lines
• Eight 6-bit Pulse Width Modulator (PWM) outputs for
control of TV analog signals
• One 14-bit PWM for Voltage Synthesis Tuner (VST)
control
• 8-bit Analog-to-Digital Converter (ADC) with four
multiplexed inputs
• Two high current outputs for directly driving LEDs etc.
• I2C-bus byte level interface with dual ports
• UART for asynchronous serial communication
• External ROM and SRAM compatibility.
8 MEMORY ORGANISATION
The device has the capability of a maximum of 192-kbyte
Program ROM and 14-kbyte Data RAM internally.
8.1 ROM bank switching
The 128-kbyte Program ROM variant is arranged in four
banks of 32 kbytes. One of the 32-kbyte banks is common
and is always addressable. The other three banks
(Bank 0, Bank 1 and Bank 2) can be selected with SFR
ROMBK bits <2:0> (see Table 2 and Fig. 3).
The 192-kbyte Program ROM variant is arranged in six
banks of 32 kbytes. One of the 32-kbyte banks is common
and is always addressable. The other five banks (Bank 0,
Bank 1, Bank 2, Bank 3 and Bank 4) can be selected with
SFR ROMBK bits <2:0> (see Table 2 and Fig. 3).
Table 2 ROM bank selection
ROMBK2 ROMBK1 ROMBK0
0 to
32-kbyte
32 to
64-kbyte
0
0
0
common Bank 0
0
0
1
common Bank 1
0
1
0
common Bank 2
0
1
1
common Bank 3
1
0
0
common Bank 4
1
0
1
reserved reserved
1
1
0
reserved reserved
1
1
1
reserved reserved
2001 Dec 13
9
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