MM74HC125CW Просмотр технического описания (PDF) - Fairchild Semiconductor
Номер в каталоге
Компоненты Описание
производитель
MM74HC125CW Datasheet PDF : 6 Pages
| |||
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 45 pF, tr = tf = 6 ns
Symbol
Parameter
tPHL, tPLH
tPZH
tPHZ
tPZL
tPLZ
Maximum
Propagation Delay Time
Maximum
Output Enable Time to HIGH Level
Maximum
Output Disable Time from HIGH Level
Maximum
Output Enable Time to LOW Level
Maximum
Output Disable Time from LOW Level
Conditions
RL = 1 kΩ
RL = 1 kΩ
CL = 5 pF
RL = 1 kΩ
RL = 1 kΩ
CL = 5 pF
Typ
Guaranteed
Limit
Units
13
18
ns
13
25
ns
17
25
ns
18
25
ns
13
25
ns
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions
VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −40 to 125°C Units
Guaranteed Limits
tPHL, tPLH Maximum Propagation
Delay Time
2.0V
40
100
125
4.5V
14
20
25
150
ns
30
ns
6.0V
12
17
21
25
ns
tPLH, tPHL Maximum Propagation
Delay Time
CL = 150 pF
2.0V
35
130
163
4.5V
14
26
33
195
ns
39
ns
6.0V
12
22
28
39
ns
tPZH, tPZL Maximum Output
Enable Time
RL = 1 kΩ
2.0V
25
125
156
4.5V
14
25
31
188
ns
38
ns
6.0V
12
21
26
31
ns
tPHZ, tPLZ Maximum Output
Disable Time
RL = 1 kΩ
2.0V
25
125
156
4.5V
14
25
31
188
ns
38
ns
6.0V
12
21
26
31
ns
tPZL, tPZH Maximum Output
Enable Time
CL = 150 pF
RL = 1 kΩ
2.0V
35
140
175
4.5V
15
28
35
6.0V
13
24
30
210
ns
42
ns
36
ns
tTLH, tTHL Maximum Output
Rise and Fall Time
CL = 50 pF
2.0V
30
60
75
4.5V
7
12
15
90
ns
18
ns
6.0V
6
10
13
15
ns
CIN
COUT
CPD
Input Capacitance
Output Capacitance Outputs
Power Dissipation
Capacitance (Note 5)
(per gate)
Enabled
5
10
10
15
20
20
45
10
pF
20
pF
pF
Disabled
6
pF
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
3
www.fairchildsemi.com
Share Link: 