AZ7500C(2010) Просмотр технического описания (PDF) - BCD Semiconductor
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AZ7500C Datasheet PDF : 12 Pages
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PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Pin Configuration
M Package
(SOIC-16)
1IN + 1
1IN - 2
FEEDBACK 3
DTC 4
CT 5
RT 6
GND 7
C1 8
16 2IN +
15 2IN -
14 REF
13 OUTPUT CTRL
12 VCC
11 C2
10 E2
9 E1
Figure 2. Pin Configuration of AZ7500C (Top View)
Output Function Control Table
Signal for Output Control
VI = GND
VI = VREF
Output Function
Single-ended or parallel output
Normal push-pull operation
Data Sheet
AZ7500C
Functional Block Diagram
RT 6
5
CT
Oscillator
Dead-Time Control
Comparator
4
DTC
+
0.12V
1
1IN +
1IN - 2
Error Amplifier 1
+
+
PWM
Comparator
2IN + 16
2IN - 15
Error Amplifier 2
+
0.7mA
3
FEEDBACK
OUTPUT CTRL
13
Pulse-Steering
Flip-Flop
D
CK
Reference
Regulator
8 C1
Q1
9 E1
11 C2
Q2
10
E2
12
VCC
14
REF
7
GND
Figure 3. Functional Block Diagram of AZ7500C
May 2010 Rev. 1. 8
BCD Semiconductor Manufacturing Limited
2
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