AY0438 Просмотр технического описания (PDF) - Microchip Technology

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AY0438

32-Segment CMOS LCD Driver

Microchip Technology 

AY0438

1.3 LCDφ

LCDφ can be driven by an external signal or by con-

necting a capacitor between LCDφ and ground (GND),

which will enable the on-chip oscillator required to gen-

erate the backplane output voltage. Figure 5 shows the

relationship between capacitance value and output fre-

quency. Leaving the LCDφ input unconnected is not

recommended. When driven by an external clock, the

backplane output is in phase with the input clock. When

cascading two AY0438 devices (Figure 6 and

Figure 7), the backplane output can be generated

using a capacitor to GND on the first AY0438. This

backplane output can then be connected to the LCDφ

input of the second AY0438. The backplane output of

the second device is then used to drive the backplane

of the LCD module.

FIGURE 6: CASCADING TWO AY0438 DEVICES

FIGURE 5: OSCILLATOR FREQUENCY

GRAPH (TYPICAL @ 25°C)

140

120

100

80

60

40

0

20 40 60 80 100 120

CL (pF)

Data

in

Clock

Load

Clock

Load

Data

32-bit Static Shift Register out

32 Latches

Data

in Clock

Load

32-bit Static Shift Register

32 Latches

Data

out

LCDΦ

32 Segment Drivers

LCD AC

Generator

Backplane

output

1 to 32

Outputs

LCDΦ

32 Segment Drivers

LCD AC

Generator

Backplane

output

33 to 64

Outputs

FIGURE 7: CASCADE TIMING DIAGRAM

CLOCK

Data in

Data out

Load

START

1

SEG 64

1/f

63

SEG 2

64

SEG 1

tDS

tDH

tPD

tPW

© 1995 Microchip Technology Inc.

DS70010I-page 3

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