AV9170 Просмотр технического описания (PDF) - Integrated Circuit Systems
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AV9170 Datasheet PDF : 11 Pages
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AV9170
Electrical Characteristics at 3.3V
VDD = +3.3V ±5%, TA = 0°C to 70°C, unless otherwise stated
A/C CHARACTERISTICS
PARAMETER
SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Input Clock Rise Time
ICLKr*
—
—
10
ns
Input Clock Fall Time
ICLKf*
—
—
10
ns
Output Rise time, 0.8 to 2.0V
tr1* 15pF load.
—
1.1
2
ns
Rise time, 20% to 80% VDD
tr2* 15pF load.
—
1.8
4
ns
Output Fall time, 2.0 to 0.8V
tf1* 15pF load.
—
0.8
2
ns
Fall time, 80% to 20% VDD
tf2* 15pF load.
—
1.2
3
ns
Output Duty Cycle, AV9170-01, -04
dt1* 15pF load. Note 2, 3
40
52
60
%
Output Duty Cycle, AV9170-02, -05
dt2* 15pF load. Note 2, 3
45
51
55
%
Jitter, 1 sigma
T1s*
—
150
300
ps
Jitter, absolute
For CLK1 > 10 MHz
Tabs1*
(-01, -04)
For CLK1 > 2.5 MHz
–500
—
(-02, -05)
500
ps
Jitter, absolute
For CLK1 < 10 MHz
Tabs2*
(-01, -04)
For CLK1 < 2.5 MHz
–2
—
2
%
(-02, -05)
Input Frequency
fi1 AV9170-01, -04
7
—
66.7 MHz
Input Frequency
fi2 AV9170-02, -05
2
—
16.7 MHz
Output Frequency CLK1
fo1 AV9170-01, -04
20
—
66.7 MHz
Output Frequency CLK1
fo2 AV9170-02, -05
5
—
16.7 MHz
FBIN to IN skew
Tskew1*
Note 2, 4; 15pF load
3.0 £ VDD £ 3.7
–8.0
–2.0
0
ns
FBIN to IN skew
Tskew2*
Note 2, 4; 15pF load
3.0 £ VDD £ 3.7
–5.0
–2.0
0
ns
CLK1 to CLK2 skew
Tskew3* Note 2, 4; 15pF load
–2.0
–0.9
0
ns
*Parameter guaranteed by design and characterization. Not 100% tested in production.
Notes:
1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application.
2. All AC Specifications are measured with a 50W transmission line, load terminated with 50W to 1.4V.
3. Duty cycle measured at 1.4V.
4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal.
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