ATR2434 Просмотр технического описания (PDF) - Atmel Corporation
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ATR2434 Datasheet PDF : 35 Pages
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Register
Descriptions
Table 2 displays the list of registers inside the ATR2434 that are addressable through
the SPI interface. All registers are read and writable, except where noted.
Table 2. Register Map(1)
Register Name
Mnemonic
Revision ID
REG_ID
Synthesizer A Counter
REG_SYN_A_CNT
Synthesizer N Counter
REG_SYN_N_CNT
Control
REG_CONTROL
Data Rate
REG_DATA_RATE
Configuration
REG_CONFIG
SERDES Control
REG_SERDES_CTL
Receive Interrupt Enable
REG_RX_INT_EN
Receive Interrupt Status
REG_RX_INT_STAT
Receive Data A
REG_RX_DATA_A
Receive Valid A
REG_RX_VALID_A
Receive Data B
REG_RX_DATA_B
Receive Valid B
REG_RX_VALID_B
Transmit Interrupt Enable
REG_TX_INT_EN
Transmit Interrupt Status
REG_TX_INT_STAT
Transmit Data
REG_TX_DATA
Transmit Valid
REG_TX_VALID
PN Code
REG_PN_CODE
Threshold Low
REG_THRESHOLD_L
Threshold High
REG_THRESHOLD_H
Wake Enable
REG_WAKE_EN
Wake Status
REG_WAKE_STAT
Analog Control
REG_ANALOG_CTL
Channel
REG_CHANNEL
Receive Signal Strength Indicator
REG_RSSI
Power Control
REG_PA
Crystal Adjust
REG_CRYSTAL_ADJ
VCO Calibration
REG_VCO_CAL
AGC Control
REG_AGC_CTL
Carrier Detect
REG_CARRIER_DETECT
Clock Manual
REG_CLOCK_MANUAL
Clock Enable
REG_CLOCK_ENABLE
Synthesizer Lock Count
REG_SYN_LOCK_CNT
Manufacturing ID
REG_MID
Note: 1. All registers are accessed Little Endian.
Address
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11-0x18
0x19
0x1A
0x1C
0x1D
0x20
0x21
0x22
0x23
0x24
0x26
0x2E
0x2F
0x32
0x33
0x38
0x3C-0x3F
Default
0x07
0x00
0x00
0x00
0x00
0x01
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x1E8B6A3DE0E9B222
0x08
0x38
0x00
0x01
0x04
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x64
-
Access
RO
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
RW
RO
RW
RW
RW
RW
RW
RW
RO
RW
RW
RO
RW
RW
RW
RW
RW
RW
RW
RW
RO
10 ATR2434 [Preliminary]
4822C–ISM–09/04
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