ATMEGA406(2005) Просмотр технического описания (PDF) - Atmel Corporation

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Компоненты Описание

производитель

ATMEGA406
(Rev.:2005)

8-bit Microcontroller with 40K Bytes In-System Programmable Flash

Atmel Corporation 

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Page

0x1B (0x3B)

PCIFR

–

–

–

–

–

–

PCIF1

PCIF0

0x1A (0x3A)

Reserved

–

–

–

–

–

–

–

–

0x19 (0x39)

Reserved

–

–

–

–

–

–

–

–

0x18 (0x38)

Reserved

–

–

–

–

–

–

–

–

0x17 (0x37)

Reserved

–

–

–

–

–

–

–

–

0x16 (0x36)

TIFR1

–

–

–

–

–

–

OCF1A

TOV1

104

0x15 (0x35)

TIFR0

–

–

–

–

–

OCF0B

OCF0A

TOV0

95

0x14 (0x34)

Reserved

–

–

–

–

–

–

–

–

0x13 (0x33)

Reserved

–

–

–

–

–

–

–

–

0x12 (0x32)

Reserved

–

–

–

–

–

–

–

–

0x11 (0x31)

Reserved

–

–

–

–

–

–

–

–

0x10 (0x30)

Reserved

–

–

–

–

–

–

–

–

0x0F (0x2F)

Reserved

–

–

–

–

–

–

–

–

0x0E (0x2E)

Reserved

–

–

–

–

–

–

–

–

0x0D (0x2D)

Reserved

–

–

–

–

–

–

–

–

0x0C (0x2C)

Reserved

–

–

–

–

–

–

–

–

0x0B (0x2B)

PORTD

–

–

–

–

–

–

PORTD1

PORTD0

75

0x0A (0x2A)

DDRD

–

–

–

–

–

–

DDD1

DDD0

75

0x09 (0x29)

PIND

–

–

–

–

–

–

PIND1

PIND0

75

0x08 (0x28)

PORTC

–

–

–

–

–

–

–

PORTC0

78

0x07 (0x27)

Reserved

–

–

–

–

–

–

–

–

0x06 (0x26)

Reserved

–

–

–

–

–

–

–

–

0x05 (0x25)

PORTB

PORTB7

PORTB6

PORTB5

PORTB4

PORTB3

PORTB2

PORTB1

PORTB0

74

0x04 (0x24)

DDRB

DDB7

DDB6

DDB5

DDB4

DDB3

DDB2

DDB1

DDB0

74

0x03 (0x23)

PINB

PINB7

PINB6

PINB5

PINB4

PINB3

PINB2

PINB1

PINB0

75

0x02 (0x22)

PORTA

PORTA7

PORTA6

PORTA5

PORTA4

PORTB3

PORTA2

PORTA1

PORTA0

74

0x01 (0x21)

DDRA

DDA7

DDA6

DDA5

DDA4

DDA3

DDA2

DDA1

DDA0

74

0x00 (0x20)

PINA

PINA7

PINA6

PINA5

PINA4

PINA3

PINA2

PINA1

PINA0

74

Notes:

1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses

should never be written.

2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-

isters, the value of single bits can be checked by using the SBIS and SBIC instructions.

3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on

all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions

work with registers 0x00 to 0x1F only.

4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-

ters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega406 is a complex

microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and

OUT instructions. For the Extended I/O space from $60 - $FF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions

can be used.

12 ATmega406

2548AS–AVR–01/05

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