ATF1508ASZ-25JC84 Просмотр технического описания (PDF) - Atmel Corporation

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ATF1508ASZ-25JC84

High Performance E2 PLD

Atmel Corporation 

ATF1508AS/Z

ing the buried feedback, expander and CASCADE logic.

The output enable for each macrocell can be selected as

one of the global OUTPUT enable signals. The device has

six global OE signals.

Global Bus/Switch Matrix

The global bus contains all input and I/O pin signals as well

as the buried feedback signal from all 128 macrocells.

The Switch Matrix in each Logic Block receives as its inputs

all signals from the global bus. Under software control, up

to 40 of these signals can be selected as inputs to the

Logic Block.

Foldback Bus

Each macrocell also generates a foldback product term.

This signal goes to the regional bus and is available to 16

macrocells. The foldback is an inverse polarity of one of the

macrocell’s product terms. The 16 foldback terms in each

region allows generation of high fan-in sum terms (up to 21

product terms) with a small additional delay.

3.3V or 5.0V I/O Operation

The ATF1508AS device has two sets of VCC pins viz,

VCCINT and VCCIO. VCCINT pins must always be connected to

a 5.0V power supply. VCCINT pins are for input buffers and

are “compatible” with both 3.3V and 5.0V inputs. VCCIO pins

are for I/O output drives and can be connected for 3.3/5.0V

power supply.

Open-Collector Output Option

This option enables the device output to provide control

signals such as an interrupt that can be asserted by any of

the several devices.

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