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AT93C46C(2002) Просмотр технического описания (PDF) - Atmel Corporation

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Компоненты Описание
производитель
AT93C46C
(Rev.:2002)
Atmel
Atmel Corporation Atmel
AT93C46C Datasheet PDF : 14 Pages
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AT93C46C
Instruction Set for the AT93C46C
Instruction SB Op Code
READ
1
10
EWEN
1
00
ERASE
1
11
WRITE
1
01
ERAL
1
00
WRAL
1
00
EWDS
1
00
Address
x 16
A5 - A0
11XXXX
A5 - A0
A5 - A0
10XXXX
01XXXX
00XXXX
Comments
Reads data stored in memory, at specified address.
Write enable must precede all programming modes.
Erase memory location An - A0.
Writes memory location An - A0.
Erases all memory locations. Valid only at VCC = 4.5V to 5.5V.
Writes all memory locations. Valid only at VCC = 4.5V to 5.5V.
Disables all programming instructions.
Functional
Description
The AT93C46C is accessed via a simple and versatile three-wire serial communication
interface. Device operation is controlled by seven instructions issued by the host pro-
cessor. A valid instruction starts with a rising edge of CS and consists of a Start Bit
(logic 1) followed by the appropriate Op Code and the desired memory Address
location.
READ (READ): The Read (READ) instruction contains the Address code for the mem-
ory location to be read. After the instruction and address are decoded, data from the
selected memory location is available at the serial output pin DO. Output data changes
are synchronized with the rising edges of serial clock SK. It should be noted that a
dummy bit (logic 0) precedes the 16-bit data output string.
ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the
Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable
(EWEN) instruction must be executed first before any programming instructions can be
carried out. Please note that once in the Erase/Write Enable state, programming
remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC
power is removed from the part.
ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified
memory location to the logical 1state. The self-timed erase cycle starts once the
ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY
status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS).
A logic 1at pin DO indicates that the selected memory location has been erased, and
the part is ready for another instruction.
WRITE (WRITE): The Write (WRITE) instruction contains the 16 bits of data to be writ-
ten into the specified memory location. The self-timed programming cycle tWP starts
after the last bit of data is received at serial data input pin DI. The DO pin outputs the
READY/BUSY status of the part if CS is brought high after being kept low for a minimum
of 250 ns (tCS). A logic 0at DO indicates that programming is still in progress. A logic
1indicates that the memory location at the specified address has been written with the
data pattern contained in the instruction and the part is ready for further instructions. A
Ready/Busy Status cannot be obtained if the CS is brought high after the end of
the self-timed programming cycle, tWP.
5
1122DSEEPR08/02

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