AT90S1200 Просмотр технического описания (PDF) - Atmel Corporation

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AT90S1200

8-Bit Microcontroller with 1K bytes In-System Programmable Flash

Atmel Corporation 

• Bit 3 – ACIE: Analog Comparator Interrupt Enable

When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the Ana-

log Comparator Interrupt is activated. When cleared (zero), the interrupt is disabled.

• Bit 2 – Res: Reserved Bit

This bit is a reserved bit in the AT90S1200 and will always read as zero.

• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select

These bits determine which comparator events trigger the Analog Comparator Interrupt.

The different settings are shown in Table 7.

Table 7. ACIS1/ACIS0 Settings

ACIS1

ACIS0 Interrupt Mode

0

0

Comparator Interrupt on Output Toggle

0

1

Reserved

1

0

Comparator Interrupt on Falling Output Edge

1

1

Comparator Interrupt on Rising Output Edge

Note:

When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be dis-

abled by clearing its Interrupt Enable bit in the ACSR register. Otherwise, an interrupt

can occur when the bits are changed.

28 AT90S1200

0838H–AVR–03/02

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