AT24C512C-XUM Просмотр технического описания (PDF) - Atmel Corporation

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AT24C512C-XUM

I²C-Compatiable (2-wire) Serial EEPROM 512-Kbit (65,536 x 8)

Atmel Corporation 

6. Device Operation

Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may

change only during SCL low time periods (see Figure 6-4 on page 8). Data changes during SCL high periods will indicate

a Start or Stop condition as defined below.

Start Condition: A high-to-low transition of SDA with SCL high is a Start condition, which must precede any other

command (see Figure 6-5 on page 8).

Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop

command will place the EEPROM in a standby power mode (see Figure 6-5 on page 8).

Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The

EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.

Standby Mode: The AT24C512C features a low-power standby mode, which is enabled:

 Upon power-up and

 After the receipt of the Stop bit and the completion of any internal operations.

Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by

following these steps:

1. Create a Start condition

2. Clock nine cycles

3. Create another Start condition followed by a Stop condition, as shown in Figure 6-1 below.

The device is ready for the next communication after the above steps have been completed.

Figure 6-1. Software Reset

Dummy Clock Cycles

SCL

1

2

3

Start

Bit

SDA

8

9

Start

Bit

Stop

Bit

Atmel AT24C512C [DATASHEET]

6

8720C–SEEPR–7/12

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