ICL7149 Просмотр технического описания (PDF) - Intersil

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ICL7149

3³/₄Digit, Autoranging Multimeter

Intersil 

ICL7139, ICL7149

Range 1 Deintegrate

Range 3

At the beginning of the deintegrate cycle, the polarity of the

voltage on the integrator capacitor (CINT) is checked, and

either the DElNT+ or DElNT- is asserted. The integrator

capacitor CINT is then discharged with a current equal to

VREF/RDElNT. The comparator monitors the voltage on CINT.

When the voltage on CINT is reduced to zero (actually to the

VOS of the comparator), the comparator output switches, and

the current count is latched. If the CINT voltage zero-crossing

does not occur before 4000 counts have elapsed, the over-

load flag is set. “OL” (overload) is then displayed on the LCD. If

the latched result is between 360 and 3999, the count is trans-

ferred to the output latches and is displayed. When the count

is less than 360, an underrange has occurred, and the

ICL7139 and ICL7149 then switch to range 2 - the 40V scale.

Range 2

The range 2 measurement begins with an autozero cycle

similar to the one that preceded range 1 integration. Range 2

cycle length however, is one AC line cycle, minus 360 clock

cycles. When performing the range 2 cycle, the signal is inte-

grated for 100 clock cycles, distributed throughout one line

cycle. This is done to maintain good normal mode rejection.

Range 2 sensitivity is ten times greater than range 1 (100 vs

10 clock cycle integration) and the full scale voltage of

range 2 is 40V. The range 2 deintegrate cycle is identical to

the range 1 deintegrate cycle, with the result being displayed

only for readings greater than 360 counts. If the reading is

below 360 counts, the ICL7139 and ICL7149 again asserts

the internal underrange signal and proceeds to range 3.

The range 3V or 4V full scale measurement is identical to the

range 2 measurement, except that the input signal is inte-

grated during the full 1000 clock cycles (one line frequency

cycle). The result is displayed if the reading is greater than

360 counts. Underrange is asserted, and a range 4 measure-

ment is performed if the result is below 360 counts.

Range 4

This measurement is similar to the range 1, 2 and 3 mea-

surements, except that the integration period is 10,000 clock

cycles (10 line cycles) long. The result of this measurement

is transferred to the output latches and displayed even if the

reading is less than 360.

Autozero

After finding the first range for which the reading is above

360 counts, the display is updated and an autozero cycle is

entered. The length of the autozero cycle is variable which

results in a fixed measurement period of 24,000 clock cycles

(24 line cycles).

DC Current

Figure 4 shows a simplified block diagram of the analog

section of the ICL7139 and ICL7149 during DC current

measurement. The DC current measurements are very

similar to DC voltage measurements except: 1) The input

voltage is developed by passing the input current through a

0.1Ω (HI current ranges), or 9.9Ω (LOW current ranges)

TRIPLE

POINT

CAZ

CINT

CAZ

RDEINT

CINT

RDEINT

LOW I

HIGH I

INT I

RINTI

9.9Ω

I

T

T AZ

VREF

DEINT+

AZ

AZ

DEINT-

AZ

DEINT-

VREF

-

+

INTEGRATOR

-

+

DEINT+

COMPARATOR

TO LOGIC SECTION

V+

0.1Ω

ANALOG

COMMON

COMMON

-

+

6.7V

T = (INT)(AR)(AZ)

AR = AUTORANGE CHOPPER

AZ = AUTOZERO

INT = INTEGRATE

80µA

V-

FIGURE 4. DETAILED CIRCUIT DIAGRAM FOR DC CURRENT MEASUREMENT

3-38

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