HI7133CM44 Просмотр технического описания (PDF) - Intersil
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HI7133CM44 Datasheet PDF : 21 Pages
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HI7131, HI7133
VIN +VREF
-VREF
CINT
RINT
-
+
-
+
FIXED
VARIABLE
INTEGRATION
DEINTEGRATION
TIME
TIME
t
REFERENCE
VOLTAGE
SWITCH
DRIVE
INTEGRATOR
COMPARATOR
TIMING SIGNALS
31/2 DIGIT BCD COUNTER
MAXIMUM COUNT: 1999
RESET
ENABLE
CLK
fCLK
CONTROL
LOGIC
VARIABLE
SLOPE
INTEGRATOR
OUTPUT
FOR POSITIVE
INPUT
COUNTER
OUTPUT
FIXED
SLOPE
LATCHES
AND
LATCH
DISPLAY DRIVERS
CLOCK
GENERATOR
1000
DISPLAY
0
TINT
t1
FIGURE 91. DUAL SLOPE INTEGRATING A/D CONVERTER
t
t2
Figure 3 shows a typical waveform of the integrator output
for 2 different positive input values and the associated repre-
sentation of the counter output for those inputs. TINT is the
time period of integrating phase. t1 and t2 are the end of
measurement for 2 different inputs.
The dual slope integrating technique puts the primary
responsibility for accuracy on the reference voltage. The val-
ues of RINT and CINT and the clock frequency (fCLK) are not
important, provided they are stable during each conversion
cycle. This can be expressed mathematically as follows:
TINT
TDEINT
∫ ∆V INT = -R----I--N----T--1--C----I--N-----T- 0 VINdt = R-----I--N----T--1--C----I--N-----T-
∫
0
VREFdt
in this configuration the full scale range of the converter is
twice its reference voltage.
The inherent advantages of integrating A/D converters are;
very small nonlinearity error, no possibility of missing codes
and good high frequency noise rejection.
Furthermore, the integrating converter has extremely high
normal mode rejection of frequencies whose periods are an
integral multiple of the integrating period (TINT). This feature
can be used to reject the line frequency related noises which
are riding on input voltage by appropriate selection of clock
frequency. This is shown in Figure 4.
30
∆V INT = R---V--I--NI--N--T--T--C--I--NI--N--T---T- = -V---R-R----IE--N--F--T--t-CD-----EI--N--I-N-T----T-
20
VIN: Input Average Value During Integration Time
TINT = 1000-f-C---1--L---K--
tDEINT = A ccumulated Countsf--C---1--L---K--
10
Accumulated Counts = 1000V---V--R---I-EN----F- = Display Reading
TINT = INTEGRATION PERIOD
f = INPUT OR NOISE FREQUENCY
It can be seen that the output reading of the ADC is only
proportional to the ratio of VIN over VREF. The last equation
also demonstrates that for the maximum display reading
(i.e., 1999) we will have VIN = 1.999 VREF. This implies that
0
0.1/TINT
1/TINT
f
10/TINT
FIGURE 92. NOISE REJECTION FOR INTEGRATING TYPE A/D
CONVERTER
3-1834
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