AS8S512K32P-45L/XT Просмотр технического описания (PDF) - Austin Semiconductor

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Компоненты Описание

производитель

AS8S512K32P-45L/XT

512K x 32 SRAM SRAM MEMORY ARRAY

Austin Semiconductor 

Austin Semiconductor, Inc.

SRAM

AS8S512K32

& AS8S512K32A

CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)1

SYMBOL

PARAMETER

CADD

A0 - A18 Capacitance

COE

OE\ Capacitance

CWE, CCS

WE\ and CS\ Capacitance

CIO

I/O 0- I/O 31 Capacitance

CWE ("A" version) WE\ Capacitance

NOTE:

1. This parameter is sampled.

MAX

50

50

20

20

50

UNITS

pF

pF

pF

pF

pF

AC TEST CONDITIONS

Test Specifications

Input pulse levels.........................................VSS to 3V

Input rise and fall times.........................................5ns

Input timing reference levels...............................1.5V

Output reference levels........................................1.5V

Output load..............................................See Figure 1

Current Source

Device

-

Under

Test

+

Ceff = 50pf

Current Source

IOL

+

IOH

Vz = 1.5V

(Bipolar

Supply)

NOTES:

Vz is programmable from -2V to + 7V.

IOL and IOH programmable from 0 to 16 mA.

Vz is typically the midpoint of VOH and VOL.

IOL and IOH are adjusted to simulate a typical resistive load

circuit.

Figure 1

AS8S512K32 & AS8S512K32A

Rev. 6.0 6/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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