AS4LC4M16DG-6/IT Просмотр технического описания (PDF) - Austin Semiconductor

Номер в каталоге

Компоненты Описание

производитель

AS4LC4M16DG-6/IT

4 MEG x 16 DRAM Extended Data Out (EDO) DRAM

Austin Semiconductor 

Austin Semiconductor, Inc.

DRAM

AS4LC4M16

DRAM ACCESS (continued)

A logic HIGH on WE\ dictates read mode, while a logic

LOW on WE\ dictates write mode. During a WRITE cycle,

data-in (D) is latched by the falling edge of WE or CAS\ (CASL\

or CASH\), whichever occurs last. An EARLY WRITE occurs

when WE is taken LOW prior to either CAS\ falling. A LATE

WRITE or READ-MODIFY-WRITE occurs when WE falls after

CAS\ (CASL\ or CASH\) is taken LOW. During EARLY WRITE

cycles, the data outputs (Q) will remain High-Z, regardless of

the state of OE\. During LATE WRITE or READ-MODIFY-

WRITE cycles, OE\ must be taken HIGH to disable the data

outputs prior to applying input data. If a LATE WRITE or

READ-MODIFY-WRITE is attempted while keeping OE\ LOW,

no write will occur, and the data outputs will drive read data

from the accessed location.

Additionally, both bytes are active. A CAS\ precharge

must be satisfied prior to changing modes of operation be-

tween the upper and lower bytes. For example, an EARLY

WRITE on one byte and a LATE WRITE on the other byte are

not allowed during the same cycle. However, an EARLY WRITE

on one byte and a LATE WRITE on the other byte, after a CAS\

precharge has been satisfied, are permissible.

EDO PAGE MODE

DRAM READ cycles have traditionally turned the output

buffers off (High-Z) with the rising edge of CAS\. If CAS\ went

HIGH and OE\ was LOW (active), the output buffers would be

disabled. The 64MB EDO DRAM offers an accelerated page

mode cycle by eliminating output disable from CAS\ HIGH.

This option is called EDO, and it allows CAS\ precharge time

(tCP) to occur without the output data going invalid (see READ

and EDO-PAGE-MODE READ waveforms).

EDO operates like any DRAM READ or FAST-PAGE-

MODE READ, except data is held valid after CAS\ goes HIGH,

as long as RAS\ and OE\ are held LOW and WE\ is held HIGH.

OE\ can be brought LOW or HIGH while CAS\ and RAS\ are

LOW, and the DQs will transition between valid data and High-

Z. Using OE\, there are two methods to disable the outputs and

FIGURE 2: WORD and BYTE READ Example

AS4LC4M16

Rev. 1.1 6/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

4

Share Link: