AS29LV016JTRG-70 Просмотр технического описания (PDF) - Austin Semiconductor
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AS29LV016JTRG-70
Austin Semiconductor
AS29LV016JTRG-70 Datasheet PDF : 40 Pages
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COTS PEM
BOOT SECTOR FLASH
Austin Semiconductor, Inc.
AS29LV016J
PIN CONFIGURATION
A0–A19 =
DQ0–DQ14 =
DQ15/A-1 =
BYTE# =
CE#
=
OE#
=
WE#
=
WP#
=
RESET# =
RY/BY# =
VCC
=
VSS
=
NC
=
20 addresses
15 data inputs/outputs
DQ15 (data input/output, word mode),
A-1 (LSB address input, byte mode)
Selects 8-bit or 16-bit mode
Chip enable
Output enable
Write enable
Write protect: The WP# contains an
internal pull-up; when unconnected,
WP is at VIH
Hardware reset
Ready/Busy output
3.0 volt-only single power supply (see
Product Selector Guide for speed
options and voltage supply tolerances)
Device ground
Pin not connected internally
CONNECTION DIAGRAMS
LOGIC SYMBOL
20
A0–A19
16 or 8
DQ0–DQ15
(A-1)
CE#
OE#
WE#
RESET#
BYTE#
WP#
RY/BY#
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
NC
10
WE#
11
RESET#
12
NC
13
WP#
14
RY/BY#
15
A18
16
A17
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
48 Pin Standard TSOP
48
A16
47
BYTE#
46
VSS
45
DQ15/A-1
44
DQ7
43
DQ14
42
DQ6
41
DQ13
40
DQ5
39
DQ12
38
DQ4
37
VCC
36
DQ11
35
DQ3
34
DQ10
33
DQ2
32
DQ9
31
DQ1
30
DQ8
29
DQ0
28
OE#
27
VSS
26
CE#
25
A0
AS29LV016J
Rev. 0.0 02/09
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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