AS1154_V2 Просмотр технического описания (PDF) - austriamicrosystems AG

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AS1154_V2

Dual LVDS Driver

austriamicrosystems AG 

AS1154

Datasheet - Detailed Description

8 Detailed Description

LVDS Interface

The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled-impedance medium as defined

by the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other common communication stan-

dards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise.

The AS1154 is an 800Mbps dual differential LVDS driver that is designed for high-speed, point-to-point, low-power applications. This device

accepts LVTTL/LVCMOS input levels and translates them to LVDS output signals.

The AS1154 generates a 2.5mA to 4.5mA output current using a current-steering configuration. This current steering approach induces less

ground bounce and no shoot-through current, enhancing noise margin and system speed performance. The driver outputs are short-circuit cur-

rent limited, and enter a high-impedance state when the device is not powered or is disabled.

The current-steering architecture of the AS1154 requires a resistive load to terminate the signal and complete the transmission loop. Because

the device switches current and not voltage, the actual output voltage swing is determined by the value of the termination resistor at the input of

an LVDS receiver (AS1157, AS1158). Logic states are determined by the direction of current flow through the termination resistor.

With a typical 3.7mA output current, the AS1154 produces an output voltage of 370mV when driving a 100Ω load.

Termination

Because the AS1154 is a current-steering device, no output voltage will be generated without a termination resistor. The termination resistors

should match the differential impedance of the transmission line. Output voltage levels depend upon the value of the termination resistor.

The AS1154 is optimized for point-to-point interface with 100Ω termination resistors at the receiver inputs. Termination resistance values may

range between 90 and132Ω, depending on the characteristic impedance of the transmission medium.

www.austriamicrosystems.com/Interfaces-LVDS/AS1154

Revision 1.02

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