APW7324 Просмотр технического описания (PDF) - Anpec Electronics
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APW7324 Datasheet PDF : 22 Pages
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APW7324
Pin Description
Pin
NO.
Name
Function
SOP-8P TDFN3x3-10
Signal Input. VCC supplies the control circuitry, gate drivers. Connecting a ceramic bypass
1
7
VCC capacitor from VCC to GND to eliminate switching noise and voltage ripple on the input to
the IC.
Power Good Output. This pin is open-drain logic output that is
2
8
POK pulled to ground when the output voltage is not within ±12.5% of regulation point. The
POK pin, if used, needs an external pull high resistor in the range of 30kΩ~100kΩ
3
9
GND Ground. Power and signal ground.
Output Feedback Input. The APW7324 senses the feedback voltage via FB and regulates
4
10
FB the voltage at 0.8V. Connecting FB with a resistor-divider from the converter’s output sets
the output voltage.
Enable Input. EN is a digital input that turns the regulator on or off. Driving the EN high
5
1
EN turns on the regulator, otherwise, driving it low turns it off. The EN pin is internally pulled
high via a 300kΩ resistor.
6
3
PGND Power Ground.
7
4, 5
LX Power Switching Output. LX is the Junction of the high-side and low-side Power
MOSFETs to supply power to the output LC filter.
8
6
VIN Power Input. VIN supplies the step-down converter switches.
9
11
Exposed Exposed pad. Connect the exposed pad to the system ground plane with large copper
Pad area for dissipating heat into the ambient air.
Copyright © ANPEC Electronics Corp.
9
Rev. A.4 - Aug., 2013
www.anpec.com.tw
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