CA3080 Просмотр технического описания (PDF) - Harris Semiconductor
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CA3080 Datasheet PDF : 7 Pages
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CA3080, CA3080A
Electrical Specifications For Equipment Design, VSUPPLY = ±15V, Unless Otherwise Specified (Continued)
CA3080
PARAMETER
TEST CONDITIONS TEMP MIN TYP MAX
Peak Output
Voltage
Positive IABC = 5µA, RL = ∞
Negative
25
-
13.8
-
25
-
-14.5
-
Positive IABC = 500µA, RL = ∞
25
12 13.5
-
Negative
25
-12 -14.4
-
Amplifier Supply Current
Device Dissipation
Magnitude of Leakage Current
Propagation Delay
Common-Mode Rejection Ratio
Open-Loop Bandwidth
Slew Rate
IABC = 500µA
IABC = 500µA
IABC = 0, VTP = 0
IABC = 0, VTP = 36V
IABC = 500µA
IABC = 500µA
IABC = 500µA
Uncompensated
25
0.8
1
1.2
25
24
30
36
25
-
0.08
-
25
-
0.3
-
25
-
45
-
25
80 110
-
25
-
2
-
25
-
75
-
Compensated
25
-
50
-
CA3080A
MIN TYP MAX
12 13.8
-
-12 -14.5
-
12 13.5
-
-12 -14.4
-
0.8
1
1.2
24
30
36
-
0.08
5
-
0.3
5
-
45
-
80
110
-
-
2
-
-
75
-
-
50
-
Schematic Diagram
Q4
D2
D3
Q6 Q7
Q5
INVERTING
INPUT
2
NON-
INVERTING 3
INPUT
AMPLIFIER 5
BIAS INPUT
Q1
Q2
Q3
D1
7 V+
D3
D4
Q8
Q9
OUTPUT
6
Q10
Q11
V-
D6
4
UNITS
V
V
V
V
mA
mW
nA
nA
ns
dB
MHz
V/µs
V/µs
Typical Applications
V+ = 15V
0.01µF
10kΩ
7
3
+
62kΩ
5
390pF
51Ω 300Ω
CA3080, A
6
2-
4 0.01µF
LOAD
(SCOPE PROBE)
5pF
1MΩ
OUTPUT
1V/DIV.
VS = ±15V
10kΩ V- = -15V
0.001µF
INPUT
5V/DIV.
TIME -0.1µs/DIV.
FIGURE 1. SCHEMATIC DIAGRAM OF THE CA3080 AND CA3080A IN A UNITY-GAIN VOLTAGE FOLLOWER CONFIGURATION
AND ASSOCIATED WAVEFORM
3-47
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