AN663 Просмотр технического описания (PDF) - Silicon Laboratories

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AN663

PRECISION32 MCU FAMILY CLOCKING OPTIONS

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AN663

2.5. PLL Oscillator (PLLnOSC)

The PLLn module available on SiM3xxxx devices is a digital PLL capable of generating output frequencies

between 23 MHz and the maximum device operating frequency. The PLL has configurable output ranges and

frequencies, multiple reference clock inputs, locking on either the falling or rising edge of the reference, DCO

frequency LSB dithering to provide finer average output frequencies, spectrum spreading to reduce generated

system noise, low jitter, and fast lock times.

The PLLn module also supports three output modes: free-running DCO, frequency-locked, and phase-locked. The

PLL can lock on a reference frequency and then switch to free-running DCO mode to save power.

Figure 8 displays the PLLn module block diagram.

RTCn Oscillator

Divided Low Power Oscillator

EXTOSCn Clock

USBn Oscillator

PLLn Module

Reference

Frequency

(FREF)

N+1

M+1

Phase and

Frequency Adjuster

OUTMD

DITHER

CAL

RANGE

Digitally-Controlled

Oscillator (DCO)

Spectrum

Spreading

Figure 8. PLL Module Block Diagram

Output

Frequency

(FDCO)

Rev. 0.1

9

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