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CXB1583Q

266Mbaud Fibre Channel Transceiver IC

Sony Semiconductor 

CXB1583Q

Pin

No.

Symbol

Type

Typical pin

I/O voltage

Equivalent circuit

VCCE

VCCG

Description

65, TXSIN

66 TXSIN∗

ECL

input

(differ-

ential)

ECL level

ECL-IN

ECL-IN∗

VEEE

VCCE – 1.3V

Serial ECL data input.

When TXSER is high,

this input signal is

output from SDOUT.

VEEG

VCCE

VCCG

67 LOL

ECL

ECL-IN

input Open or ECL

(single level

phase)

VCCE – 1.3V

Lost-of-light signal

input.

Low level when this

pin is left open.

VEEE

VCCG

VEEG

70

ECKENB∗

TTL

input

3.3V or TTL

high level

TTL-IN

Test pin.

VEET

VCCG

73 LPBK

TTL

input

TTL level

TTL-IN

VEET

VEEG

Loop-back enable.

If LPBK is set to high,

the signal output from

SDOUT when LPBK

is low is transmitted to

the RX input with the

internal connection.

In this time, SDOUT/

SDOUT∗ are fixed to

VEEG

low/high respectively

and SDIN/SDIN∗ are

both disabled.

–9–

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