PRELIMINARY
CS
Chip Select
Input, Active LOW
The chip-select input, when asserted, enables a read
from or a write to the 8-bit parallel port of the HIMIB
device.
RDY
Ready
Output, Open Drain
Ready is driven LOW at the start of every read or write
cycle and is released when the HIMIB device is ready
to complete the transaction.
INT
Interrupt
Output, Active LOW, Open Drain
Interrupt is driven LOW when any of the unmasked
(enabled) interrupts occur.
VDD
Power
This pin supplies +5 V to the device. Connect to DVDD
of the IMR+ device.
VSS
Ground
These two pins are the 0 V reference for the device.
Connect to DVSS of the IMR+ device.
6
Am79C987