AM79C987 Просмотр технического описания (PDF) - Advanced Micro Devices
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AM79C987 Datasheet PDF : 30 Pages
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PRELIMINARY
AMD
For P = 0 (Repeater Registers), the following registers
are accessible:
For other valid port numbers (P in the range 16...23 or
31), the following Attribute Registers are available:
R[4:0]
10
12
13
16
28
30
31
Register
Source Address Match (6-byte)
Total Octets (4-byte)
Transmit Collisions (4-byte)
Configuration Register
Version/Device ID
IMR+ Management Port Set Register
IMR+ Management Port Get Register
Register 12 and 13 are 4 bytes long and their contents
are read in the least to most significant byte order.
Register 10 is 6 bytes long and can be read as well as
written to in the least to most significant byte order.
Port Status Registers are organized as follows (P = 1):
R[4:0]
0
1
2
3
4
5
6
7
8
9
Register
TP (Twisted Pair) Ports Partition Status Change
AUI Port Partition Status Change
TP Link Status Change
AUI Loop Back Error
Reserved
AUI SQE Test Error
TP Source Address Change
AUI Source Address Change
TP Source Address Match Status
AUI Source Address Match Status
R[4:0]
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Register
Readable Frames
Readable Octets
Frame Check Sequence Errors
Alignment Errors
Frames Too Long
Short Events
Runts
Collisions
Late Events
Very Long Events
Data Rate Mismatches
Auto Partitions
Source Address Changes
Reserved
Last Source Address
Registers 0 through 12 are 4 bytes long and their con-
tents are read in the least to most significant byte order.
Register 14 is 6 bytes long and can be read as well as
written to in the least to most significant byte order.
Note that the contents of all attribute registers are main-
tained during an external reset. At power up, the values
of all 4- and 6-byte attributes are random.
Port Control Registers are organized as follows (P = 2):
R[4:0]
0
1
2
3
4
5
6
7
Register
TP Partition Change Interrupt Enable
AUI Partition Change Interrupt Enable
TP Link Status Change Interrupt Enable
AUI Loop Back Error Interrupt Enable
Reserved
AUI SQE Test Error Interrupt Enable
TP Source Address Change Interrupt Enable
AUI Source Address Change Interrupt Enable
10
Am79C987
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